Patents by Inventor Tobias Bernhard

Tobias Bernhard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250076093
    Abstract: In examples, a sensing device comprises a semiconductor die including a device side and a fluid sensor in the device side. The device comprises a metal ring forming an opening over the fluid sensor, the metal ring having a top surface, a bottom surface, and an inner surface extending between the top surface and the bottom surface, and the bottom surface being on the device side. At least a portion of the inner surface abuts the device side being plated with a noble metal. The device includes a mold compound covering the semiconductor die and a first portion of the metal ring, in which a second portion of the metal ring having the top surface protrudes out of the mold compound and provides at least one of a cartridge interface or a tube interface.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 6, 2025
    Inventors: Sebastian MEIER, Rujuta MUNJE, Tobias Bernhard FRITZ, Sreenivasan Kalyani KODURI
  • Publication number: 20250060002
    Abstract: A bearing is provided for mounting the drive shaft of a work apparatus in a guide tube. The bearing includes a bearing tube defining a central axis and having a continuous bearing opening for receiving the drive shaft. The bearing opening is non-circular in at least one cross section. In the non-circular cross section, the bearing opening has first sections lying against an incircle of the bearing opening and second sections lying in the circumferential direction between the first sections. The second sections are at a distance from the incircle. The first sections are in the form of elevations whereat the inner wall of the bearing opening projects in the direction of the central axis. A work apparatus includes the bearing.
    Type: Application
    Filed: August 16, 2024
    Publication date: February 20, 2025
    Inventors: Simon Jetter, Lars Robert Kraft, Tobias Bernhard, Matthias Maier
  • Publication number: 20250017113
    Abstract: In described examples, a circuit includes a substrate and a first resistor on the substrate, the first resistor in a first direction. The circuit also includes a second resistor on the substrate, the second resistor coupled to the first resistor, the second resistor in a second direction, the second direction and the first direction transversely oriented and a device on the substrate.
    Type: Application
    Filed: September 16, 2024
    Publication date: January 9, 2025
    Inventors: Umidjon Nurmetov, Ralf Peter Brederlow, Baher Haroun, Jose Antonio Vieira Formenti, Michael Szelong, Tobias Bernhard Fritz
  • Patent number: 12127480
    Abstract: In described examples, a circuit includes an analog frontend arranged to generate an analog stress compensating signal in response to a to-be-compensated analog signal and a first-axis stress sensing signal. The analog frontend can comprise a first precision component (e.g., 220) arranged on a piezoelectric material and arranged to generate the to-be-compensated analog signal that is affected by a stress exerted in the piezoelectric material and a directional stress sensor arranged on the piezoelectric material and coupled to the first precision component. The directional stress sensor is arranged to generate the first-axis sensing signal in response to a longitudinal resultant of a stress exerted in the piezoelectric material. A compensating circuit is arranged to generate a compensated output signal in response to the compensating analog signal and to-be-compensated analog signal.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: October 22, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Umidjon Nurmetov, Ralf Peter Brederlow, Baher Haroun, Jose Antonio Vieira Formenti, Michael Szelong, Tobias Bernhard Fritz
  • Publication number: 20240274529
    Abstract: An electronic device has an electronic device includes a substrate and a first dielectric layer over the substrate. The electronic device also includes a first metal layer on the first dielectric layer, the first metal layer including a first plate and a second dielectric layer over the first dielectric layer and the first metal layer. Additionally, the electronic device includes a second metal layer on the second dielectric layer. The second metal layer includes a second plate spaced apart from the first plate and a winding around the second plate.
    Type: Application
    Filed: April 22, 2024
    Publication date: August 15, 2024
    Inventors: Klaas De Haan, Mikhail Valeryevich Ivanov, Tobias Bernhard Fritz, Swaminathan Sankaran, Thomas Dyer Bonifield
  • Patent number: 12033936
    Abstract: An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first or second metal layers and coupled to one of the first or second plates in a resonant circuit.
    Type: Grant
    Filed: October 10, 2022
    Date of Patent: July 9, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Klaas De Haan, Mikhail Valeryevich Ivanov, Tobias Bernhard Fritz, Swaminathan Sankaran, Thomas Dyer Bonifield
  • Publication number: 20240183052
    Abstract: A process for electrochemical deposition of copper, including: providing a rolled and annealed copper foil comprising a first surface and a second surface, etching the first surface of the rolled and annealed copper foil, thereby creating a first etched surface, depositing copper by electroless copper deposition on the first etched surface, thereby creating a first electroless copper layer on the first etched surface, depositing further copper by electrochemical deposition on the first electroless copper layer, thereby creating a first electrochemical copper layer, wherein in the electrochemical deposition in a first period of time a first current density is applied and in a second period of time a second current density is applied, wherein the second current density is lower than the first current density, and a layered product obtainable by the process.
    Type: Application
    Filed: March 25, 2022
    Publication date: June 6, 2024
    Applicant: Atotech Deutschland GmbH & Co. KG
    Inventors: Peter HAACK, Vera PELDZINSKI-RANISCH, Grigory VAZHENIN, Hee-Bum SHIN, Jaewon LEE, Tobias BERNHARD
  • Patent number: 11653568
    Abstract: An integrated circuit is described herein that includes a semiconductor substrate. First and second piezoresistive sensors are on or in the substrate where each have a respective sensing axis extending in first and second directions respectively parallel with a surface of the substrate, where the second direction is perpendicular to the first direction. A third piezoresistive sensor is on or in the substrate and has a respective sensing axis extending in a third direction parallel with the surface of the substrate and neither parallel nor perpendicular to the first and second directions.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: May 16, 2023
    Assignee: Texas Instmments Incorporated
    Inventors: Baher Haroun, Tobias Bernhard Fritz, Michael Szelong, Ernst Muellner
  • Patent number: 11581309
    Abstract: An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: February 14, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Michael Szelong, James Robert Todd, Tobias Bernhard Fritz, Ralf Peter Brederlow
  • Publication number: 20230031204
    Abstract: An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first or second metal layers and coupled to one of the first or second plates in a resonant circuit.
    Type: Application
    Filed: October 10, 2022
    Publication date: February 2, 2023
    Inventors: Klaas De Haan, Mikhail Valeryevich Ivanov, Tobias Bernhard Fritz, Swaminathan Sankaran, Thomas Dyer Bonifield
  • Patent number: 11536773
    Abstract: An electronic device includes an ADC, a multiplexer, a voltage reference circuit, an analog circuit, and a digital circuit. The ADC has a signal input, a reference input, and an output. The multiplexer has signal inputs and a signal output coupled to the signal input of the ADC. The voltage reference circuit has an output coupled to the reference input of the ADC, a first strain sensor coupled to a first signal input of the multiplexer, a second strain sensor coupled to a second signal input of the multiplexer, and a temperature sensor. The analog circuit has an input coupled to a battery, and an output coupled to a fourth signal input of the multiplexer. The digital circuit is coupled to the output of the ADC and stores correction parameters for correcting a converted battery voltage value from the ADC.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: December 27, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jose Antonio Vieira Formenti, Michael Szelong, Takao Oshida, Tobias Bernhard Fritz, Vishnu Ravinuthula
  • Patent number: 11476189
    Abstract: An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first and second metal layers and coupled to one of the first and second plates in a resonant circuit.
    Type: Grant
    Filed: December 12, 2020
    Date of Patent: October 18, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Klaas De Haan, Mikhail Valeryevich Ivanov, Tobias Bernhard Fritz, Swaminathan Sankaran, Thomas Dyer Bonifield
  • Publication number: 20220221353
    Abstract: A force sensor including a semiconductor die, and a die pad coupled to the semiconductor die, the semiconductor die configured to detect a force in the die pad. In addition, the force sensor includes a mold compound covering the semiconductor die and having an outer perimeter, a first side, and a second side opposite the first side, the outer perimeter extending between the first side and the second side, the die pad exposed out of the mold compound along the first side. Further, the force sensor includes a mounting frame engaged with the die pad along the second side of the mold compound, the mounting frame including multiple mounting pads extended outward in multiple directions from the outer perimeter.
    Type: Application
    Filed: November 30, 2021
    Publication date: July 14, 2022
    Inventors: Tobias Bernhard FRITZ, Baher S. HAROUN, Benjamin Stassen COOK, Sreenivasan Kalyani KODURI, Michael SZELONG, Ernst MUELLNER
  • Publication number: 20220223486
    Abstract: An example semiconductor package includes a semiconductor die configured to detect a force. In addition, the semiconductor package includes a mold compound covering the semiconductor die. Further, the semiconductor package includes an engagement surface including a pattern of projections adapted to engage with a mounting surface on a member of interest.
    Type: Application
    Filed: November 30, 2021
    Publication date: July 14, 2022
    Inventors: Tobias Bernhard FRITZ, Baher S. HAROUN, Benjamin Stassen COOK, Michael SZELONG, Ernst MUELLNER, Jeronimo SEGOVIA-FERNANDEZ
  • Publication number: 20220223488
    Abstract: An example semiconductor package includes a semiconductor die. In addition, the semiconductor package includes a mold compound having a first side, a second side opposite the first side, and an axis extending between the first side and the second side, the mold compound covering the semiconductor die. Further, the semiconductor package includes an interface member including a first portion and a second portion, the first portion is coupled to the second portion. The first portion is positioned along the first side, the second portion is positioned along the second side, and an engagement of a welding horn with the first portion is adapted to weld the second portion to a surface.
    Type: Application
    Filed: November 30, 2021
    Publication date: July 14, 2022
    Inventors: Tobias Bernhard FRITZ, Marcus Rudolf ZIMNIK
  • Publication number: 20220187378
    Abstract: An electronic device includes an ADC, a multiplexer, a voltage reference circuit, an analog circuit, and a digital circuit. The ADC has a signal input, a reference input, and an output. The multiplexer has signal inputs and a signal output coupled to the signal input of the ADC. The voltage reference circuit has an output coupled to the reference input of the ADC, a first strain sensor coupled to a first signal input of the multiplexer, a second strain sensor coupled to a second signal input of the multiplexer, and a temperature sensor. The analog circuit has an input coupled to a battery, and an output coupled to a fourth signal input of the multiplexer. The digital circuit is coupled to the output of the ADC and stores correction parameters for correcting a converted battery voltage value from the ADC.
    Type: Application
    Filed: July 30, 2021
    Publication date: June 16, 2022
    Applicant: Texas Instruments Incorporated
    Inventors: Jose Antonio Vieira Formenti, Michael Szelong, Takao Oshida, Tobias Bernhard Fritz, Vishnu Ravinuthula
  • Publication number: 20220189873
    Abstract: An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first and second metal layers and coupled to one of the first and second plates in a resonant circuit.
    Type: Application
    Filed: December 12, 2020
    Publication date: June 16, 2022
    Inventors: Klaas De Haan, Mikhail Valeryevich Ivanov, Tobias Bernhard Fritz, Swaminathan Sankaran, Thomas Dyer Bonifield
  • Publication number: 20220173095
    Abstract: An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.
    Type: Application
    Filed: February 18, 2022
    Publication date: June 2, 2022
    Inventors: Michael SZELONG, James Robert TODD, Tobias Bernhard FRITZ, Ralf Peter BREDERLOW
  • Patent number: 11257814
    Abstract: An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: February 22, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Szelong, James Robert Todd, Tobias Bernhard Fritz, Ralf Peter Brederlow
  • Publication number: 20220020915
    Abstract: In described examples, a circuit includes an analog frontend arranged to generate an analog stress compensating signal in response to a to-be-compensated analog signal and a first-axis stress sensing signal. The analog frontend can comprise a first precision component (e.g., 220) arranged on a piezoelectric material and arranged to generate the to-be-compensated analog signal that is affected by a stress exerted in the piezoelectric material and a directional stress sensor arranged on the piezoelectric material and coupled to the first precision component. The directional stress sensor is arranged to generate the first-axis sensing signal in response to a longitudinal resultant of a stress exerted in the piezoelectric material. A compensating circuit is arranged to generate a compensated output signal in response to the compensating analog signal and to-be-compensated analog signal.
    Type: Application
    Filed: July 17, 2020
    Publication date: January 20, 2022
    Inventors: Umidjon Nurmetov, Ralf Peter Brederlow, Baher Haroun, Jose Antonio Vieira Formenti, Michael Szelong, Tobias Bernhard Fritz