Abstract: An integrated circuit is described herein that includes a semiconductor substrate. First and second piezoresistive sensors are on or in the substrate where each have a respective sensing axis extending in first and second directions respectively parallel with a surface of the substrate, where the second direction is perpendicular to the first direction. A third piezoresistive sensor is on or in the substrate and has a respective sensing axis extending in a third direction parallel with the surface of the substrate and neither parallel nor perpendicular to the first and second directions.

Abstract: An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.

Abstract: An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first or second metal layers and coupled to one of the first or second plates in a resonant circuit.

Abstract: An electronic device includes an ADC, a multiplexer, a voltage reference circuit, an analog circuit, and a digital circuit. The ADC has a signal input, a reference input, and an output. The multiplexer has signal inputs and a signal output coupled to the signal input of the ADC. The voltage reference circuit has an output coupled to the reference input of the ADC, a first strain sensor coupled to a first signal input of the multiplexer, a second strain sensor coupled to a second signal input of the multiplexer, and a temperature sensor. The analog circuit has an input coupled to a battery, and an output coupled to a fourth signal input of the multiplexer. The digital circuit is coupled to the output of the ADC and stores correction parameters for correcting a converted battery voltage value from the ADC.

Abstract: An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first and second metal layers and coupled to one of the first and second plates in a resonant circuit.

Abstract: An example semiconductor package includes a semiconductor die. In addition, the semiconductor package includes a mold compound having a first side, a second side opposite the first side, and an axis extending between the first side and the second side, the mold compound covering the semiconductor die. Further, the semiconductor package includes an interface member including a first portion and a second portion, the first portion is coupled to the second portion. The first portion is positioned along the first side, the second portion is positioned along the second side, and an engagement of a welding horn with the first portion is adapted to weld the second portion to a surface.

Abstract: A force sensor including a semiconductor die, and a die pad coupled to the semiconductor die, the semiconductor die configured to detect a force in the die pad. In addition, the force sensor includes a mold compound covering the semiconductor die and having an outer perimeter, a first side, and a second side opposite the first side, the outer perimeter extending between the first side and the second side, the die pad exposed out of the mold compound along the first side. Further, the force sensor includes a mounting frame engaged with the die pad along the second side of the mold compound, the mounting frame including multiple mounting pads extended outward in multiple directions from the outer perimeter.

Abstract: An example semiconductor package includes a semiconductor die configured to detect a force. In addition, the semiconductor package includes a mold compound covering the semiconductor die. Further, the semiconductor package includes an engagement surface including a pattern of projections adapted to engage with a mounting surface on a member of interest.

Abstract: An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first and second metal layers and coupled to one of the first and second plates in a resonant circuit.

Abstract: An electronic device includes an ADC, a multiplexer, a voltage reference circuit, an analog circuit, and a digital circuit. The ADC has a signal input, a reference input, and an output. The multiplexer has signal inputs and a signal output coupled to the signal input of the ADC. The voltage reference circuit has an output coupled to the reference input of the ADC, a first strain sensor coupled to a first signal input of the multiplexer, a second strain sensor coupled to a second signal input of the multiplexer, and a temperature sensor. The analog circuit has an input coupled to a battery, and an output coupled to a fourth signal input of the multiplexer. The digital circuit is coupled to the output of the ADC and stores correction parameters for correcting a converted battery voltage value from the ADC.

Abstract: An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.

Abstract: An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.

Abstract: In described examples, a circuit includes an analog frontend arranged to generate an analog stress compensating signal in response to a to-be-compensated analog signal and a first-axis stress sensing signal. The analog frontend can comprise a first precision component (e.g., 220) arranged on a piezoelectric material and arranged to generate the to-be-compensated analog signal that is affected by a stress exerted in the piezoelectric material and a directional stress sensor arranged on the piezoelectric material and coupled to the first precision component. The directional stress sensor is arranged to generate the first-axis sensing signal in response to a longitudinal resultant of a stress exerted in the piezoelectric material. A compensating circuit is arranged to generate a compensated output signal in response to the compensating analog signal and to-be-compensated analog signal.

Abstract: An integrated circuit is described herein that includes a semiconductor substrate. First and second piezoresistive sensors are on or in the substrate where each have a respective sensing axis extending in first and second directions respectively parallel with a surface of the substrate, where the second direction is perpendicular to the first direction. A third piezoresistive sensor is on or in the substrate and has a respective sensing axis extending in a third direction parallel with the surface of the substrate and neither parallel nor perpendicular to the first and second directions.

Abstract: An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.

Abstract: A circuit includes a serializer module that includes an input stage that samples an input signal to capture an edge location for each of the input signal in a given time frame. An edge encoder encodes the edge location for the input signal into a packet frame to specify where the edge location occurs in the given time frame for the input signal. A transmitter receives the packet frame from the edge decoder and converts the packet frame into a serial data stream. The transmitter communicates the edge location for the input signal via the serial data stream.

Abstract: A motor drive circuit includes a first serializer-deserializer (SER-DES) module that converts first SER-DES input signals into a first SER-DES output serial data stream. The first SER-DES input signals relate to motor control inputs or motor drive power outputs. A second SER-DES module converts a second SER-DES input serial data stream corresponding to the first SER-DES output serial data stream into second SER-DES output signals. The second SER-DES input signals relate to motor drive power outputs or motor control inputs. A serial isolation channel provides a galvanic isolation barrier between the first SER-DES module and the second SER-DES module. The serial isolation channel communicates the first SER-DES output serial data stream across the galvanic isolation barrier to provide the second SER-DES input serial data stream.

Abstract: In described examples, a system includes a transformer including a primary winding and a secondary winding. The system also includes a primary side circuit coupled to the primary winding of the transformer. The primary side circuit includes a primary controller. The system further includes a secondary side circuit coupled to the secondary winding of the transformer. The primary controller coupled to cause the primary side circuit to transfer power and intermittently transmit data to the secondary side circuit via the primary winding and the secondary winding of the transformer.

Abstract: Described examples include an integrated circuit including a receive portion to receive an encoded transmission on a line. The receive portion has: a wake mode in which the receiver is capable of receiving the encoded transmission; and a sleep mode in which the receiver is not capable of receiving the encoded transmission. A wakeup controller monitors the line for a wakeup signal and provides a signal to the receive portion to cause the receive portion to enter the wake mode when the wakeup controller receives the wakeup signal.

Abstract: A circuit includes a serializer module that includes an input stage that samples an input signal to capture an edge location for each of the input signal in a given time frame. An edge encoder encodes the edge location for the input signal into a packet frame to specify where the edge location occurs in the given time frame for the input signal. A transmitter receives the packet frame from the edge decoder and converts the packet frame into a serial data stream. The transmitter communicates the edge location for the input signal via the serial data stream.