Abstract: A logic gate device comprising a probe structure having an interface contact, a first logic input for receiving a first light pulse having a first carrier-envelope phase that encodes an input state of the first logic input and a second logic input for receiving a second light pulse having a second carrier-envelope phase that encodes an input state of the second logic input. The probe structure is arranged to be irradiated by the first light pulse to generate a first current component within the probe structure that depends on the first carrier-envelope phase and to be irradiated by the second light pulse to generate a second current component within the probe structure that depends on the second carrier-envelope phase. The interface contact is arranged to output a sum current that comprises the first and second current component, wherein the sum current encodes a logic output state of a logic output.