Abstract: A semiconductor device includes a semiconductor chip having a front side and a backside. A first electrode is disposed on the front side of the semiconductor chip. An inorganic substrate includes a first side, a second side opposite the first side, and a first lateral side extending between the first side and the second side. A metal layer is disposed over the first side and the first lateral side of the inorganic substrate. The first electrode is bonded to the metal layer.

Abstract: A method of processing a semiconductor wafer includes: forming an electronic device at each die location of the semiconductor wafer; partially forming a frontside metallization over a frontside of the semiconductor wafer at each die location; partially forming a backside metallization over a backside of the semiconductor wafer at each die location; and after partially forming both the frontside metallization and the backside metallization but without completing either the frontside metallization or the backside metallization, singulating the semiconductor wafer between the die locations to form a plurality of individual semiconductor dies, wherein the partially formed frontside metallization and the partially formed backside metallization have a same composition. Semiconductor dies and methods of producing semiconductor modules are also described.

Abstract: A die embedded package is disclosed. In one example, the die embedded package includes a first bare die and a second bare die, the first bare die being thinner than the second bare die, a first encapsulation material encapsulating the first bare die, wherein the total thickness of the first encapsulation and the first bare die is approximately equal to the thickness of the second bare die. An outer surface of the first encapsulation material and an outer surface of the second bare die are arranged coplanarly. A first and second set of electrically conductive vias electrically contact the first bare die. A third set of electrically conductive vias electrically contacts the second bare die.

Abstract: A semiconductor device includes: a semiconductor die having a front side surface, a backside surface opposite the front side surface, and side faces; a backside metallization layer at least partly covering the backside surface of the semiconductor die and projecting laterally outwards beyond the side faces of the semiconductor die; and a protection layer at least partly covering the side faces of the semiconductor die. The backside metallization layer projects laterally outwards beyond the protection layer.

Abstract: A method of manufacturing a semiconductor device includes: forming grooves in a front side surface of a wafer; filling the grooves with a first side face protection material; thinning the wafer at a backside surface of the wafer opposite the front side surface; depositing a backside metallization layer over the backside surface of the thinned wafer; and laser cutting along the grooves through the side face protection material and through the backside metallization layer to separate the wafer into multiple semiconductor devices.

Abstract: An electronic component includes a semiconductor device including a semiconductor die including a first surface, the first surface including a first metallization structure and edge regions surrounding the first metallization structure, a second surface opposing the first surface and including a second metallization structure, and side faces extending between the first surface and the second surface, wherein the edge regions of the first surface and portions of the side faces are covered by a first polymer layer, wherein the electronic component further includes a plurality of leads and a plastic housing composition, wherein the first metallization structure is coupled to a first lead and the second metallization structure is coupled to a second lead of the plurality of leads.

Abstract: A method of processing a semiconductor wafer includes: forming an electronic device at each die location of the semiconductor wafer; partially forming a frontside metallization over a frontside of the semiconductor wafer at each die location; partially forming a backside metallization over a backside of the semiconductor wafer at each die location; and after partially forming both the frontside metallization and the backside metallization but without completing either the frontside metallization or the backside metallization, singulating the semiconductor wafer between the die locations to form a plurality of individual semiconductor dies, wherein the partially formed frontside metallization and the partially formed backside metallization have a same composition. Semiconductor dies and methods of producing semiconductor modules are also described.

Abstract: A method of manufacturing a semiconductor device includes: forming grooves in a front side surface of a wafer; filling the grooves with a first side face protection material; thinning the wafer at a backside surface of the wafer opposite the front side surface; depositing a backside metallization layer over the backside surface of the thinned wafer; and laser cutting along the grooves through the side face protection material and through the backside metallization layer to separate the wafer into multiple semiconductor devices.

Abstract: A method of processing a wafer is disclosed. In one example, the method comprises providing the wafer with a separation frame separating neighboured electronic components, forming separation trenches in the separation frame and at least partially lining sidewalls of the separation trenches with a sidewall lining for partially filling the separation trenches while maintaining a void volume therein. An exterior opening of the separation trenches is closed by a closing structure.

Abstract: A semiconductor device includes a semiconductor die having a front side surface, a backside surface opposite the front side surface and side faces. A backside metallization layer is deposited over the backside surface and projects laterally outwards beyond the side faces. A side face protection layer covers the side faces.

Abstract: An electronic component includes a semiconductor device including a semiconductor die including a first surface, the first surface including a first metallization structure and edge regions surrounding the first metallization structure, a second surface opposing the first surface and including a second metallization structure, and side faces extending between the first surface and the second surface, wherein the edge regions of the first surface and portions of the side faces are covered by a first polymer layer, wherein the electronic component further includes a plurality of leads and a plastic housing composition, wherein the first metallization structure is coupled to a first lead and the second metallization structure is coupled to a second lead of the plurality of leads.

Abstract: A method of manufacturing a semiconductor wafer having a roughened metallization layer surface is described. The method includes immersing the semiconductor wafer in an electrolytic bath. Gas bubbles are generated in the electrolytic bath. A surface of a metallization layer on the semiconductor wafer is electrochemically roughened in the presence of the gas bubbles by applying a reversing voltage between the metallization layer and an electrode of the electrolytic bath.

Abstract: In an embodiment, a composite semiconductor substrate includes a first polymer layer and a plurality of semiconductor dies having a first surface, a second surface opposing the first surface, side faces extending between the first surface and the second surface and a first metallization structure on the first surface. Edge regions of the first surface and at least portions of the side faces are embedded in the first polymer layer. At least one metallic region of the first metallization structure is exposed from the first polymer layer. A second metallization structure is arranged on the second surface of the plurality of semiconductor dies. A second polymer layer is arranged on edge regions of the second surface of the plurality of semiconductor dies and on the first polymer layer in regions between the side faces of neighbouring ones of the plurality of semiconductor dies.

Abstract: A semiconductor device includes a semiconductor die having a front side surface, a backside surface opposite the front side surface and side faces. A backside metallization layer is deposited over the backside surface and projects laterally outwards beyond the side faces. A side face protection layer covers the side faces.

Abstract: A method of manufacturing a semiconductor wafer having a roughened metallization layer surface is described. The method includes immersing the semiconductor wafer in an electrolytic bath. Gas bubbles are generated in the electrolytic bath. A surface of a metallization layer on the semiconductor wafer is electrochemically roughened in the presence of the gas bubbles by applying a reversing voltage between the metallization layer and an electrode of the electrolytic bath.

Abstract: In an embodiment, a composite semiconductor substrate includes a first polymer layer and a plurality of semiconductor dies having a first surface, a second surface opposing the first surface, side faces extending between the first surface and the second surface and a first metallization structure on the first surface. Edge regions of the first surface and at least portions of the side faces are embedded in the first polymer layer. At least one metallic region of the first metallization structure is exposed from the first polymer layer. A second metallization structure is arranged on the second surface of the plurality of semiconductor dies. A second polymer layer is arranged on edge regions of the second surface of the plurality of semiconductor dies and on the first polymer layer in regions between the side faces of neighbouring ones of the plurality of semiconductor dies.

Abstract: In an embodiment, a method includes forming at least one trench in non-device regions of a first surface of a semiconductor wafer, the non-device regions being arranged between component positions, the component positions including device regions and a first metallization structure, applying a first polymer layer to the first surface of a semiconductor wafer such that the trenches and edge regions of the component positions are covered with the first polymer layer and such that at least a portion of the first metallization structure is uncovered by the first polymer layer, removing portions of a second surface of the semiconductor wafer, the second surface opposing the first surface, revealing portions of the first polymer layer in the non-device regions and producing a worked second surface and inserting a separation line through the first polymer layer in the non-device regions to form a plurality of separate semiconductor dies.

Abstract: In an embodiment, a method includes forming at least one trench in non-device regions of a first surface of a semiconductor wafer, the non-device regions being arranged between component positions, the component positions including device regions and a first metallization structure, applying a first polymer layer to the first surface of a semiconductor wafer such that the trenches and edge regions of the component positions are covered with the first polymer layer and such that at least a portion of the first metallization structure is uncovered by the first polymer layer, removing portions of a second surface of the semiconductor wafer, the second surface opposing the first surface, revealing portions of the first polymer layer in the non-device regions and producing a worked second surface and inserting a separation line through the first polymer layer in the non-device regions to form a plurality of separate semiconductor dies.

Abstract: The invention describes a lamp (1A, 1B, 1C, 1D) comprising a glass envelope (10) enclosing a light generating means (11), and an axially and/or circumferentially graded absorption coating (2A, 2B, 2C, 2D) applied to a surface of the glass envelope (10), wherein the graded absorption coating (2A, 2B, 2C, 2D) exhibits a smooth transition in a transition region (23A, 23C, 23D) from a first coated region (21 A, 21B, 21C, 21D) on the glass envelope (10) to a second coated region (22A, 22B, 22C, 22D) on the glass envelope (10). The invention further describes a lighting assembly (4) comprising a lamp according to any of claims 1 to 11 and a reflector (40) for collecting and shaping any light passing through the graded absorption coating (2A, 2B, 2C, 2D) of the lamp (1A, 1B, 1C, 1D).

Abstract: The invention describes a lamp (1A, 1B, 1C, 1D) comprising a glass envelope (10) enclosing a light generating means (11), and an axially and/or circumferentially graded absorption coating (2A, 2B, 2C, 2D) applied to a surface of the glass envelope (10), wherein the graded absorption coating (2A, 2B, 2C, 2D) exhibits a smooth transition in a transition region (23A, 23C, 23D) from a first coated region (21 A, 21B, 21C, 21D) on the glass envelope (10) to a second coated region (22A, 22B, 22C, 22D) on the glass envelope (10). The invention further describes a lighting assembly (4) comprising a lamp according to any of claims 1 to 11 and a reflector (40) for collecting and shaping any light passing through the graded absorption coating (2A, 2B, 2C, 2D) of the lamp (1A, 1B, 1C, 1D).