Patents by Inventor Toby Balsom

Toby Balsom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250044821
    Abstract: The present disclosure describes a system-on-chip (SoC) including a built-in self-test (BIST) block, a low-dropout (LDO) voltage regulator with a pass metal-oxide semiconductor field-effect transistor (MOSFET), and a current-monitor circuit with a sensing MOSFET, a tuning MOSFET, a sensing resistor, and a tuning resistor. Herein, both the pass MOSFET and the sensing MOSFET receive an input voltage, and a gate of the pass MOSFET is coupled to a gate of the sensing MOSFET. The sensing MOSFET, the tuning MOSFET, and the sensing resistor are connected in series between the input voltage and ground, and the tuning resistor is coupled between a gate of the tuning MOSFET and ground. The BIST block is configured to tune a current through the tuning resistor so as to adjust a voltage at a connection point of the sensing MOSFET and the tuning MOSFET.
    Type: Application
    Filed: October 25, 2024
    Publication date: February 6, 2025
    Inventors: Toby Balsom, Jeroen Cornelis Kuenen, Vikram Chaturvedi
  • Patent number: 12158768
    Abstract: The present disclosure describes a system-on-chip (SoC) including a built-in self-test (BIST) block, a low-dropout (LDO) voltage regulator with a pass metal-oxide-semiconductor field-effect transistor (MOSFET), and a current-monitor circuit with a sensing MOSFET, a tuning MOSFET, a sensing resistor, and a tuning resistor. Herein, both the pass MOSFET and the sensing MOSFET receive an input voltage, and a gate of the pass MOSFET is coupled to a gate of the sensing MOSFET. The sensing MOSFET, the tuning MOSFET, and the sensing resistor are connected in series between the input voltage and ground, and the tuning resistor is coupled between a gate of the tuning MOSFET and ground. The BIST block is configured to tune a current through the tuning resistor so as to adjust a voltage at a connection point of the sensing MOSFET and the tuning MOSFET.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: December 3, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Toby Balsom, Jeroen Kuenen, Vikram Chaturvedi
  • Publication number: 20230185321
    Abstract: The present disclosure describes a system-on-chip (SoC) including a built-in self-test (BIST) block, a low-dropout (LDO) voltage regulator with a pass metal-oxide-semiconductor field-effect transistor (MOSFET), and a current-monitor circuit with a sensing MOSFET, a tuning MOSFET, a sensing resistor, and a tuning resistor. Herein, both the pass MOSFET and the sensing MOSFET receive an input voltage, and a gate of the pass MOSFET is coupled to a gate of the sensing MOSFET. The sensing MOSFET, the tuning MOSFET, and the sensing resistor are connected in series between the input voltage and ground, and the tuning resistor is coupled between a gate of the tuning MOSFET and ground. The BIST block is configured to tune a current through the tuning resistor so as to adjust a voltage at a connection point of the sensing MOSFET and the tuning MOSFET.
    Type: Application
    Filed: February 15, 2022
    Publication date: June 15, 2023
    Inventors: Toby Balsom, Jeroen Kuenen, Vikram Chaturvedi