Patents by Inventor Tod Schiff
Tod Schiff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220407317Abstract: A microcontroller, processor, and/or software (SW) monitors a battery degradation indicator such as battery State-Of-Health (SOH), impedance or other attributes, and calculates battery degradation rate and regulates burst power, battery charging speed and/or battery charging limit to meet users' expectation of battery service life. The microcontroller, processor, and/or SW increases the burst power, battery charging speed and/or battery charging limit when 1/SOH or impedance change rate (or related parameter) is smaller than expected and there is more longevity budget than expected. In another example, the microcontroller, processor, and/or SW decreases the burst power, battery charging speed and/or battery charging limit when 1/SOH or impedance change rate (or related parameter) is greater than expected and there is less longevity budget than expected.Type: ApplicationFiled: June 22, 2021Publication date: December 22, 2022Applicant: Intel CorporationInventors: Naoki Matsumura, Aaron Gorius, Tod Schiff, Andrew Keates
-
Publication number: 20220224135Abstract: A software and/or hardware to monitor system usage including how long system ran on a battery or with an AC adapter. The software and/or hardware judges whether fast charging is needed and/or how much charge is needed, and optimizes battery charging settings.Type: ApplicationFiled: June 3, 2021Publication date: July 14, 2022Applicant: Intel CorporationInventors: Naoki Matsumura, Tod Schiff, Zhongsheng Wang, Chee Lim Nge, Ming-Chia Lee, Ivy Li, Brice Onken, Qiyong Brian Bian, John Valavi, Ling-shun Wong
-
Patent number: 11342775Abstract: Techniques and mechanisms for supplementing power delivery with a battery. In an embodiment, a voltage is provided at a first node with the battery to power a load circuit. A charger is coupled between the first node and a second node, wherein a capacitor is coupled to provide charge to the charger via the second node. In response to detecting a transition of the voltage below a threshold voltage level, controller logic operates switch circuitry of the charger to provide charge from the capacitor. Such operation maintains the voltage in a range of voltage levels which are each above a minimum voltage level required by the load. At least a portion of the range is below the threshold voltage level. In some embodiments, another voltage at the second node provides a basis for generating a control signal to throttle an operation of the load circuit.Type: GrantFiled: March 27, 2020Date of Patent: May 24, 2022Assignee: Intel CorporationInventors: Tod Schiff, Teal Hand, Alexander Uan-Zo-Li
-
Patent number: 11275663Abstract: A dedicated pin of a processor or system-on-chip (SoC) is used to indicate whether power level (e.g., charge, voltage, and/or current) of a battery falls below a threshold. The threshold can be predetermined or programmable. The battery is used to provide power to the processor and/or SoC. Upon determining that the power level of the battery falls below the threshold, the processor by-passes the conventional process of entering low performance or power mode, and directly throttles voltage and/or operating frequency of the processor. This allows the processor to continue to operate at low battery power. The fast transition (e.g., approximately 10 ?S) from an active state to a low performance or power mode, in accordance with a logic level of the voltage on the dedicated pin, reduces decoupling capacitor design requirements, and makes it possible for the processor to adapt higher package power control settings (e.g., PL4).Type: GrantFiled: June 8, 2020Date of Patent: March 15, 2022Assignee: Intel CorporationInventors: Alexander Gendler, Nimrod Angel, Ameya Ambardekar, Sapumal Wijeratne, Vikas Vij, Tod Schiff, Alexander Uan-Zo-Li
-
Patent number: 11231761Abstract: Power monitoring circuitry is provided to monitor an input system power profile of processing tasks executing on a processing platform. An input is provided to receive from the processing platform, a processing system signal indicating a power being consumed by the processing platform. A counter is provided to store a count value corresponding to an accumulated number or amount of times that a warning threshold condition associated with a warning threshold value is satisfied by the received processing system signal in a count-accumulation time interval. The count value is supplied to a power control circuit of the processing platform via a bus in response to a read request from the power control circuit, the power control circuit being responsive to the count value to control a performance level of the processing platform.Type: GrantFiled: September 29, 2017Date of Patent: January 25, 2022Assignee: Intel CorporationInventors: Philip Lehwalder, Robert Santucci, Tod Schiff
-
Publication number: 20210382805Abstract: A dedicated pin of a processor or system-on-chip (SoC) is used to indicate whether power level (e.g., charge, voltage, and/or current) of a battery falls below a threshold. The threshold can be predetermined or programmable. The battery is used to provide power to the processor and/or SoC. Upon determining that the power level of the battery falls below the threshold, the processor by-passes the conventional process of entering low performance or power mode, and directly throttles voltage and/or operating frequency of the processor. This allows the processor to continue to operate at low battery power. The fast transition (e.g., approximately 10 ?S) from an active state to a low performance or power mode, in accordance with a logic level of the voltage on the dedicated pin, reduces decoupling capacitor design requirements, and makes it possible for the processor to adapt higher package power control settings (e.g., PL4).Type: ApplicationFiled: June 8, 2020Publication date: December 9, 2021Applicant: Intel CorporationInventors: Alexander Gendler, Nimrod Angel, Ameya Ambardekar, Sapumal Wijeratne, Vikas Vij, Tod Schiff, Alexander Uan-Zo-Li
-
Publication number: 20210135478Abstract: A workload dependent load-sharing mechanism in a multi-battery system. The mechanism is an energy management system that operates in three modes—energy saving mode, balancer mode, and turbo mode. The energy saving mode is a normal mode where the multiple batteries provide power to their own set of loads with least resistive dissipation. In balancing mode, the batteries are connected through switches operating in active mode so that the current shared is inversely proportion to the corresponding battery state-of-charge. In turbo mode, both batteries are connected in parallel through switches (e.g., on-switches) to provide maximum power to a processor or load. A controller optimizes the sequence and charging rate for a hybrid battery to maximize both the charging current and charging speed of the battery, while enabling longer battery life. The hybrid battery comprises a fast charging battery and a high-energy density battery.Type: ApplicationFiled: December 23, 2020Publication date: May 6, 2021Applicant: Intel CorporationInventors: Jeffrey Schline, Samantha Rao, Naoki Matsumura, Ramon Cancel Olmo, Tod Schiff, Arunthathi Chandrabose
-
Publication number: 20200227933Abstract: Techniques and mechanisms for supplementing power delivery with a battery. In an embodiment, a voltage is provided at a first node with the battery to power a load circuit. A charger is coupled between the first node and a second node, wherein a capacitor is coupled to provide charge to the charger via the second node. In response to detecting a transition of the voltage below a threshold voltage level, controller logic operates switch circuitry of the charger to provide charge from the capacitor. Such operation maintains the voltage in a range of voltage levels which are each above a minimum voltage level required by the load. At least a portion of the range is below the threshold voltage level. In some embodiments, another voltage at the second node provides a basis for generating a control signal to throttle an operation of the load circuit.Type: ApplicationFiled: March 27, 2020Publication date: July 16, 2020Applicant: Intel CorporationInventors: Tod Schiff, Teal Hand, Alexander Uan-Zo-Li
-
Publication number: 20200201408Abstract: Power monitoring circuitry is provided to monitor an input system power profile of processing tasks executing on a processing platform. An input is provided to receive from the processing platform, a processing system signal indicating a power being consumed by the processing platform. A counter is provided to store a count value corresponding to an accumulated number or amount of times that a warning threshold condition associated with a warning threshold value is satisfied by the received processing system signal in a count-accumulation time interval. The count value is supplied to a power control circuit of the processing platform via a bus in response to a read request from the power control circuit, the power control circuit being responsive to the count value to control a performance level of the processing platform.Type: ApplicationFiled: September 29, 2017Publication date: June 25, 2020Inventors: PHILIP LEHWALDER, ROBERT SANTUCCI, TOD SCHIFF
-
Patent number: 10204068Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.Type: GrantFiled: February 21, 2018Date of Patent: February 12, 2019Assignee: Intel CorporationInventors: Chee Lim Nge, Tod Schiff, Vijayakumar Dibbad, Alan Hallberg
-
Publication number: 20180181515Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.Type: ApplicationFiled: February 21, 2018Publication date: June 28, 2018Inventors: Chee Lim Nge, Tod Schiff, Vijayakumar Dibbad, Alan Hallberg
-
Patent number: 9916272Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.Type: GrantFiled: January 30, 2017Date of Patent: March 13, 2018Assignee: Intel CorporationInventors: Chee Lim Nge, Tod Schiff, Vijayakumar Dibbad, Alan Hallberg
-
Publication number: 20170139864Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.Type: ApplicationFiled: January 30, 2017Publication date: May 18, 2017Inventors: Chee Lim Nge, Tod Schiff, Vijayakumar Dibbad, Alan Hallberg
-
Patent number: 9558144Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.Type: GrantFiled: September 26, 2014Date of Patent: January 31, 2017Assignee: Intel CorporationInventors: Chee Lim Nge, Tod Schiff, Vijayakumar Dibbad, Alan Hallberg
-
Publication number: 20160092393Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.Type: ApplicationFiled: September 26, 2014Publication date: March 31, 2016Inventors: Chee Lim Nge, Tod Schiff, Vijayakumar Dibbad, Alan Hallberg
-
Patent number: 8278897Abstract: A power supply converter and a method for adjusting a threshold voltage in the power supply converter. The circuit includes first and second switches having current conducting terminals commonly connected together to form a node. An energy storage element may be connected to the node and a zero current detection comparator may be connected to the node. A first voltage may be provided at the control terminal of the first switch that turns it off. After the first switch is off, determining whether the first switch turned off before or after the current in the energy storage element has reached zero. This may be accomplished by determining whether the voltage at the first node is positive or negative. If the voltage at the first node is negative, the threshold voltage is increased and if the voltage at the first node is positive the threshold voltage is decreased.Type: GrantFiled: December 17, 2009Date of Patent: October 2, 2012Assignee: Semiconductor Components Industries, LLCInventors: Tod Schiff, Brian P. Johnson
-
Patent number: 8049476Abstract: A power supply and a method for compensating for a droop component in an output signal of the power supply. The power supply may include an error amplifier and an oscillator coupled to a pulse width modulation circuit. Outputs of the pulse width modulation circuit are connected to switching circuits that have outputs coupled to an output node. The power supply further includes a droop compensation circuit connected to the output of the power supply, the outputs of the switching circuits, and to an input of the error amplifier. The droop compensation circuit includes an amplifier coupled to a feed-forward network and a current source coupled to the feed-forward network. The current source sources a current to or sinks a current from the feed-forward network to generate a droop compensation signal that is transmitted to the error amplifier. The current source may be controlled by a digital-to-analog circuit.Type: GrantFiled: December 17, 2008Date of Patent: November 1, 2011Assignee: Semiconductor Components Industries, LLCInventor: Tod Schiff
-
Publication number: 20110148377Abstract: A power supply converter and a method for adjusting a threshold voltage in the power supply converter. The circuit includes first and second switches having current conducting terminals commonly connected together to form a node. An energy storage element may be connected to the node and a zero current detection comparator may be connected to the node. A first voltage may be provided at the control terminal of the first switch that turns it off. After the first switch is off, determining whether the first switch turned off before or after the current in the energy storage element has reached zero. This may be accomplished by determining whether the voltage at the first node is positive or negative. If the voltage at the first node is negative, the threshold voltage is increased and if the voltage at the first node is positive the threshold voltage is decreased.Type: ApplicationFiled: December 17, 2009Publication date: June 23, 2011Inventors: Tod Schiff, Brian P. Johnson
-
Patent number: 7893669Abstract: Voltage converter are provided for efficient generation of voltage signals in a load. The converters are formed with a group of inductors and at least two sets of buck and sync transistors that are arranged with the group so that conducted currents through each of the sets are directed through a respective one of the inductors and further directed to magnetically couple induced currents in the respective inductor of at least an associated one of the sets. Efficiency is particularly enhanced with an operational mode that is directed to light load conditions. In this mode and in at least a selected one of the sets, the buck transistor is turned off throughout the operational mode and the sync transistor is turned off for at least the time that an associated buck transistor is turned on in an associated set which couples induced currents in the respective inductor of the selected set.Type: GrantFiled: September 10, 2007Date of Patent: February 22, 2011Assignee: Analog Devices, Inc.Inventors: Doug Osterhout, Tod Schiff
-
Publication number: 20100148738Abstract: A power supply and a method for compensating for a droop component in an output signal of the power supply. The power supply may include an error amplifier and an oscillator coupled to a pulse width modulation circuit. Outputs of the pulse width modulation circuit are connected to switching circuits that have outputs coupled to an output node. The power supply further includes a droop compensation circuit connected to the output of the power supply, the outputs of the switching circuits, and to an input of the error amplifier. The droop compensation circuit includes an amplifier coupled to a feed-forward network and a current source coupled to the feed-forward network. The current source sources a current to or sinks a current from the feed-forward network to generate a droop compensation signal that is transmitted to the error amplifier. The current source may be controlled by a digital-to-analog circuit.Type: ApplicationFiled: December 17, 2008Publication date: June 17, 2010Inventor: Tod Schiff