Patents by Inventor Todd D. Haverkos

Todd D. Haverkos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit memory using fusible links in a scan chain
    Patent number: 5677917
    Abstract: An integrated circuit memory (140) includes programmable fuses (20) coupled to scannable flip-flops (25). The programmable fuses (20) and scannable flip-flops (25) are implemented in a scan chain, and are used to program specific information about the integrated circuit memory (140), such as for example, repair (redundancy) information, wafer lot number and wafer number, die position on the wafer, or any other information that would be useful during or after package testing.
    Type: Grant
    Filed: April 29, 1996
    Date of Patent: October 14, 1997
    Assignee: Motorola, Inc.
    Inventors: Richard A. Wheelus, Todd D. Haverkos, Kenneth W. Jones