Patents by Inventor Todd David Millstein

Todd David Millstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for verifying computer program correctness and providing recoverable execution trace information
    Patent number: 7024661
    Abstract: In a system for statically analyzing a specified computer, a verification condition generator converts the program into a logical equation, called a verification condition, and inserts program flow control labels into the sub-equations of the verification condition. The flow control labels identify conditional branch points in the specified computer program. A theorem prover is applied to the logical equation to determine truth of the logical equation, and when the truth of the logical equation cannot be proved, the theorem prover generates at least one counter-example identifying one of the conditions, one or more variable values inconsistent with that condition, and any of the flow control labels for conditional branch points of the program associated with the identified variable values. A post processing module converts each counter-example into an error message that includes a program trace when the counter-example identifies one or more of the flow control labels.
    Type: Grant
    Filed: January 5, 2001
    Date of Patent: April 4, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: K. Rustan M. Leino, Todd David Millstein, James B. Saxe
  • System and method for verifying computer program correctness and providing recoverable execution trace information
    Publication number: 20020046393
    Abstract: In a system for statically analyzing a specified computer, a verification condition generator converts the program into a logical equation, called a verification condition, and inserts program flow control labels into the sub-equations of the verification condition. The flow control labels identify conditional branch points in the specified computer program. A theorem prover is applied to the logical equation to determine truth of the logical equation, and when the truth of the logical equation cannot be proved, the theorem prover generates at least one counter-example identifying one of the conditions, one or more variable values inconsistent with that condition, and any of the flow control labels for conditional branch points of the program associated with the identified variable values. A post processing module converts each counter-example into an error message that includes a program trace when the counter-example identifies one or more of the flow control labels.
    Type: Application
    Filed: January 5, 2001
    Publication date: April 18, 2002
    Inventors: K. Rustan M. Leino, Todd David Millstein, James B. Saxe