Patents by Inventor Todd Edgar

Todd Edgar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7451674
    Abstract: A torque wrench is disclosed that includes a drive head that defines a torque transfer axis and that is adapted to transfer torque to a workpiece. The torque wrench includes a tubular handle that is operative, upon rotation relative to a lever, to increase the bias on a spring upon lengthening a distance between the drive head and the opposite end of the handle, and to decrease the bias on the spring upon shortening the distance thereby setting the predetermined operating force.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: November 18, 2008
    Inventor: Todd Edgar
  • Publication number: 20080060488
    Abstract: A torque wrench is disclosed that includes a drive head that defines a torque transfer axis and that is adapted to transfer torque to a workpiece. The torque wrench includes a tubular handle that is operative, upon rotation relative to a lever, to increase the bias on a spring upon lengthening a distance between the drive head and the opposite end of the handle, and to decrease the bias on the spring upon shortening the distance thereby setting the predetermined operating force.
    Type: Application
    Filed: December 5, 2006
    Publication date: March 13, 2008
    Inventor: Todd Edgar
  • Publication number: 20070012984
    Abstract: A semiconductor device and its method of fabrication are provided. The semiconductor device includes a substrate, a patterning stop region, an insulating overlayer, a container region within the insulating overlayer, a charge storage lamina or conductive layer over an interior surface of the container region; a contact region defined by the charge storage lamina or conductive layer; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina or conductive layer occupy collectively substantially all of the container region. A bit line terminal is coupled to the charge storage lamina through a switching structure.
    Type: Application
    Filed: August 25, 2006
    Publication date: January 18, 2007
    Inventor: Todd Edgar
  • Patent number: 7115932
    Abstract: A semiconductor device and its method of fabrication are provided. The semiconductor device includes a substrate, a patterning stop region, an insulating overlayer, a container region within the insulating overlayer, a charge storage lamina or conductive layer over an interior surface of the container region; a contact region defined by the charge storage lamina or conductive layer; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina or conductive layer occupy collectively substantially all of the container region. A bit line terminal is coupled to the charge storage lamina through a switching structure.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: October 3, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Todd Edgar
  • Publication number: 20050023566
    Abstract: A semiconductor device and its method of fabrication are provided. The semiconductor device includes a substrate, a patterning stop region, an insulating overlayer, a container region within the insulating overlayer, a charge storage lamina or conductive layer over an interior surface of the container region; a contact region defined by the charge storage lamina or conductive layer; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina or conductive layer occupy collectively substantially all of the container region. A bit line terminal is coupled to the charge storage lamina through a switching structure.
    Type: Application
    Filed: September 2, 2004
    Publication date: February 3, 2005
    Inventor: Todd Edgar
  • Patent number: 6410380
    Abstract: A semiconductor device and its method of fabrication are provided. The semiconductor device includes a substrate, a patterning stop region, an insulating overlayer, a container region within the insulating overlayer, a charge storage lamina or conductive layer over an interior surface of the container region; a contact region defined by the charge storage lamina or conductive layer; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina or conductive layer occupy collectively substantially all of the container region. A bit line terminal is coupled to the charge storage lamina through a switching structure.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: June 25, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Todd Edgar
  • Publication number: 20020060335
    Abstract: A semiconductor device and its method of fabrication are provided. The semiconductor device includes a substrate, a patterning stop region, an insulating overlayer, a container region within the insulating overlayer, a charge storage lamina or conductive layer over an interior surface of the container region; a contact region defined by the charge storage lamina or conductive layer; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina or conductive layer occupy collectively substantially all of the container region. A bit line terminal is coupled to the charge storage lamina through a switching structure.
    Type: Application
    Filed: January 10, 2002
    Publication date: May 23, 2002
    Inventor: Todd Edgar
  • Publication number: 20020019095
    Abstract: A semiconductor device and its method of fabrication are provided. The semiconductor device includes a substrate, a patterning stop region, an insulating overlayer, a container region within the insulating overlayer, a charge storage lamina or conductive layer over an interior surface of the container region; a contact region defined by the charge storage lamina or conductive layer; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina or conductive layer occupy collectively substantially all of the container region. A bit line terminal is coupled to the charge storage lamina through a switching structure.
    Type: Application
    Filed: October 4, 2001
    Publication date: February 14, 2002
    Inventor: Todd Edgar
  • Publication number: 20010022376
    Abstract: A semiconductor device and its method of fabrication are provided. The semiconductor device includes a substrate, a patterning stop region, an insulating overlayer, a container region within the insulating overlayer, a charge storage lamina or conductive layer over an interior surface of the container region; a contact region defined by the charge storage lamina or conductive layer; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina or conductive layer occupy collectively substantially all of the container region. A bit line terminal is coupled to the charge storage lamina through a switching structure.
    Type: Application
    Filed: May 24, 1999
    Publication date: September 20, 2001
    Inventor: TODD EDGAR
  • Patent number: 5970340
    Abstract: A semiconductor device and its method of fabrication are provided. The semiconductor device includes a substrate, a patterning stop region, an insulating overlayer, a container region within the insulating overlayer, a charge storage lamina or conductive layer over an interior surface of the container region; a contact region defined by the charge storage lamina or conductive layer; and an electrical contact in the contact region, wherein respective portions of the electrical contact and the charge storage lamina or conductive layer occupy collectively substantially all of the container region. A bit line terminal is coupled to the charge storage lamina through a switching structure.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: October 19, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Todd Edgar