Abstract: In some examples, a direct current (DC)-DC power converter package comprises a controller, a conductive member, and a first field effect transistor (FET) coupled to the controller and having a first source and a first drain, the first FET coupled to a first portion of the conductive member. The package also comprises a second FET coupled to the controller and having a second source and a second drain, the second FET coupled to a second portion of the conductive member, the first and second portions of the conductive member being non-overlapping in a horizontal plane. The first and second FETs are non-overlapping.

Abstract: In some examples, a direct current (DC)-DC power converter package comprises a controller, a conductive member, and a first field effect transistor (FET) coupled to the controller and having a first source and a first drain, the first FET coupled to a first portion of the conductive member. The package also comprises a second FET coupled to the controller and having a second source and a second drain, the second FET coupled to a second portion of the conductive member, the first and second portions of the conductive member being non-overlapping in a horizontal plane. The first and second FETs are non-overlapping.

Abstract: In some examples, a direct current (DC)-DC power converter package comprises a controller, a conductive member, and a first field effect transistor (FET) coupled to the controller and having a first source and a first drain, the first FET coupled to a first portion of the conductive member. The package also comprises a second FET coupled to the controller and having a second source and a second drain, the second FET coupled to a second portion of the conductive member, the first and second portions of the conductive member being non-overlapping in a horizontal plane. The first and second FETs are non-overlapping.

Abstract: In some examples, a direct current (DC)-DC power converter package comprises a controller, a conductive member, and a first field effect transistor (FET) coupled to the controller and having a first source and a first drain, the first FET coupled to a first portion of the conductive member. The package also comprises a second FET coupled to the controller and having a second source and a second drain, the second FET coupled to a second portion of the conductive member, the first and second portions of the conductive member being non-overlapping in a horizontal plane. The first and second FETs are non-overlapping.

Abstract: In an embodiment, an adaptive drive strength switching converter includes a driver and a control loop coupled to the driver. In an embodiment, the control loop includes a peak detector, a comparator coupled to an output of the peak detector, a counter coupled to an output of the comparator, and a digital-to-analog converter (DAC) coupled to an output of the comparator.

Abstract: In an embodiment, an adaptive drive strength switching converter includes a driver and a control loop coupled to the driver. In an embodiment, the control loop includes a peak detector, a comparator coupled to an output of the peak detector, a counter coupled to an output of the comparator, and a digital-to-analog converter (DAC) coupled to an output of the comparator.

Abstract: A method of operating a DC/DC converter in a continuous-conduction mode (CCM) or in a discontinuous-conduction mode (DCM) to produce an output voltage, the DC/DC converter setting a pulse width modulation in CCM based on a COMP signal that varies as a function of the output voltage, the method including capturing the COMP signal utilizing a digital-to-analog converter at a transition between CCM and DCM, and varying a frequency of operation of the DC/DC converter in DCM based on the captured COMP signal.

Abstract: A filter is implemented as cascaded stages, and in at least one stage all resistances are implemented as double-sampled switched-capacitor circuits. In a variation, at least one resistance is implemented as a double-sampled switched-capacitor T-network. In a variation, in an integrator stage, a resistance is implemented as a transconductance, and the cutoff frequency of the integrator stage scales with a switching frequency of a DC-DC voltage converter.

Abstract: A filter is implemented as cascaded stages, and in at least one stage all resistances are implemented as double-sampled switched-capacitor circuits. In a variation, at least one resistance is implemented as a double-sampled switched-capacitor T-network. In a variation, in an integrator stage, a resistance is implemented as a transconductance, and the cutoff frequency of the integrator stage scales with a switching frequency of a DC-DC voltage converter.

Abstract: A stacked die power converter package includes a lead frame including a die pad and a plurality of package pins, a first die including a first power transistor switch (first power transistor) attached to the die pad, and a first metal clip attached to one side of the first die. The first metal clip is coupled to at least one package pin. A second die including a second power transistor switch (second power transistor) is attached to another side on the first metal clip. A controller is provided by a controller die attached to a second metal clip on one side of the second die, a controller die attached to the second die, or the controller is integrated on the second die. The controller is coupled to both a first control node of the first power transistor and a second control node of the second power transistor.

Abstract: A method of operating a DC/DC converter in a continuous-conduction mode (CCM) or in a discontinuous-conduction mode (DCM) to produce an output voltage, the DC/DC converter setting a pulse width modulation in CCM based on a COMP signal that varies as a function of the output voltage, the method including capturing the COMP signal utilizing a digital-to-analog converter at a transition between CCM and DCM, and varying a frequency of operation of the DC/DC converter in DCM based on the captured COMP signal.

Abstract: A method for fabricating board(s) from different types of wood or other materials in combination. Whereby the end result is a board(s) having a unique design formed thereon resulting from different intermixed colours and species of the different blended materials and/or woods therein. The method includes cutting multiple boards, forming individual wood stacks from the cut boards, re-arranging the wood stacks, interconnecting the re-arranged stacks forming at least third and fourth board and repeating the steps if desired. Also, the multiple boards and/or the third and fourth boards are a mirror image of each other.

Abstract: The present invention describes a non-rotating bicycle wheel display assembly that remains absolutely upright in relation to the rotation of a bicycle wheel and in relation to a parked bicycle wheel. The invention consists of a pair of disk assemblies mounted to both sides of a conventional bicycle wheel and in turn, to the front and rear of a bicycle frame. The disk assemblies are manufactured of a light weight inexpensive material that is formed to the convex shape of an outer surface of the bicycle wheel and includes a bearing assembly made of a high density, self lubricating plastic. A plastic retaining mechanism is secured to an outer disk and a bicycle frame member to hold the outer disk in an upright position at all times whether the bicycle is in motion or stationary.

Abstract: A multi-phase power system including a plurality of Pulse Width Modulation (PWM) controllers is provided, including a first PWM controller and at least one second PWM controller. The first PWM controller is configured to generate at least one first output signal based on a first clock signal, and to insert at least one synchronizing pulse into the first clock signal, the synchronizing pulse having a predetermined characteristic differing from pulses of the first clock signal, and to provide the first clock signal including the synchronizing pulse to the second PWM controller. The second PWM controller is configured to generate at least one second output signal based on the first clock signal, and to synchronize the generation of the first and second output signals using the synchronizing pulse within the first clock signal, thereby maintaining a predetermined phase relationship between the first and second output signals.

Abstract: Synchronously stackable double-edge modulated pulse width modulation generators are disclosed. An example pulse width modulation generator includes a ramp generator to generate first and second ramp signals that interact to form a virtual ramp signal; and a comparator module coupled to the ramp generator configured to produce a pulse width modulated signal based on a comparison between the virtual ramp signal and an input signal.

Abstract: A method and system for exchanging information regarding financial markets in a moderated environment are disclosed. According to one embodiment, a computer-implemented method comprises granting an administrator access to a collaborative interface, wherein the collaborative interface is one for a financial group that accepts posts from registered group members and distributes posts to the registered group members upon submission of new posts, and wherein the administrator approves the distribution of each new post. One or more clients are granted access to the collaborative interface, wherein the administrator identifies a permission level for each client. Posts are received from the administrator or a client of the one or more additional clients, approval is received from the administrator to display the post, and the post is displayed.

Abstract: Synchronously stackable double-edge modulated pulse width modulation generators are disclosed. An example pulse width modulation generator includes a ramp generator to generate first and second ramp signals that interact to form a virtual ramp signal; and a comparator module coupled to the ramp generator configured to produce a pulse width modulated signal based on a comparison between the virtual ramp signal and an input signal.

Abstract: The present invention describes a non-rotating display bicycle wheel cover assembly that remains absolutely upright in relation to the rotation of the bicycle wheel and in relation to a parked bicycle wheel. The invention consists of twin disk assemblies mounted to both sides of a conventional bicycle wheel and inturn to the front and rear of a bicycle frame. The disk assemblies are manufactured of lightweight inexpensive material that is formed to the convex shape of the outer surface of a bicycle wheel and includes an overmolded, captive friction bearing made of a high density, self lubricating plastic. A plastic retaining mechanism is secured to the outer disk fascia and a bicycle frame member to hold the disk in an upright position at all times whether the bicycle is in motion or in repose.

Abstract: A multi-phase power system including a plurality of Pulse Width Modulation (PWM) controllers is provided, including a first PWM controller and at least one second PWM controller. The first PWM controller is configured to generate at least one first output signal based on a first clock signal, and to insert at least one synchronizing pulse into the first clock signal, the synchronizing pulse having a predetermined characteristic differing from pulses of the first clock signal, and to provide the first clock signal including the synchronizing pulse to the second PWM controller. The second PWM controller is configured to generate at least one second output signal based on the first clock signal, and to synchronize the generation of the first and second output signals using the synchronizing pulse within the first clock signal, thereby maintaining a predetermined phase relationship between the first and second output signals.