Abstract: Various systems and methods are provided for reducing an amount of oil reaching a crankcase overpressure sensor. In one example, a system may include a cast wall protruding perpendicularly from an internal wall of crankcase, the cast wall at least partially surrounding a sensor port for a crankcase overpressure (COP) sensor, the sensor port fluidically coupled to the COP sensor via an internal passage; and a cover plate fixedly coupled to the cast wall, the cover plate parallel to the internal wall. In this way, oil may be blocked from reaching the COP sensor, while air may flow through the internal passage to the COP sensor.

Abstract: Various systems and methods are provided for reducing an amount of oil reaching a crankcase overpressure sensor. In one example, a system may include a cast wall protruding perpendicularly from an internal wall of crankcase, the cast wall at least partially surrounding a sensor port for a crankcase overpressure (COP) sensor, the sensor port fluidically coupled to the COP sensor via an internal passage; and a cover plate fixedly coupled to the cast wall, the cover plate parallel to the internal wall. In this way, oil may be blocked from reaching the COP sensor, while air may flow through the internal passage to the COP sensor.

Abstract: A locomotive engine control system includes one or more processors operably connected to fuel supply devices. The fuel supply devices are configured to supply fuel into different corresponding cylinders of an engine. The one or more processors are configured to monitor a fuel quantity injected into the cylinders of the engine before and after communication of an overfuel control signal. The overfuel control signal commands the fuel supply device corresponding to a first cylinder of the cylinders to supply excess fuel into the first cylinder. Responsive to the fuel quantity that is monitored not decreasing after the communication of the overfuel control signal, the one or more processors are configured to determine that the fuel supply device corresponding to the first cylinder is defective, and may generate one or more control signals indicative of the fuel supply device corresponding to the first cylinder being defective.

Abstract: A locomotive engine control system includes one or more processors operably connected to fuel supply devices. The fuel supply devices are configured to supply fuel into different corresponding cylinders of an engine. The one or more processors are configured to monitor a fuel quantity injected into the cylinders of the engine before and after communication of an overfuel control signal. The overfuel control signal commands the fuel supply device corresponding to a first cylinder of the cylinders to supply excess fuel into the first cylinder. Responsive to the fuel quantity that is monitored not decreasing after the communication of the overfuel control signal, the one or more processors are configured to determine that the fuel supply device corresponding to the first cylinder is defective, and may generate one or more control signals indicative of the fuel supply device corresponding to the first cylinder being defective.

Abstract: Power sources, backup power circuits, power source control circuits, data storage devices, and methods relating to controlling application of power to a node are disclosed. An example power source includes an input, backup power source, and a backup power source control circuit. The input is configured to be coupled to a primary power source and further configured to couple the primary power source to the output when the input is coupled to the primary power source. The backup power source control circuit is configured to control a current path from the backup power source to the output based at least in part on a voltage applied to the input.

Abstract: Power sources, backup power circuits, power source control circuits, data storage devices, and methods relating to controlling application of power to a node are disclosed. An example power source includes an input, backup power source, and a backup power source control circuit. The input is configured to be coupled to a primary power source and further configured to couple the primary power source to the output when the input is coupled to the primary power source. The backup power source control circuit is configured to control a current path from the backup power source to the output based at least in part on a voltage applied to the input.

Abstract: Power sources, backup power circuits, power source control circuits, data storage devices, and methods relating to controlling application of power to a node are disclosed. An example power source includes an input, backup power source, and a backup power source control circuit. The input is configured to be coupled to a primary power source and further configured to couple the primary power source to the output when the input is coupled to the primary power source. The backup power source control circuit is configured to control a current path from the backup power source to the output based at least in part on a voltage applied to the input.

Abstract: Power sources, backup power circuits, power source control circuits, data storage devices, and methods relating to controlling application of power to a node are disclosed. An example power source includes an input, backup power source, and a backup power source control circuit. The input is configured to be coupled to a primary power source and further configured to couple the primary power source to the output when the input is coupled to the primary power source. The backup power source control circuit is configured to control a current path from the backup power source to the output based at least in part on a voltage applied to the input.

Abstract: Power sources, backup power circuits, power source control circuits, data storage devices, and methods relating to controlling application of power to a node are disclosed. An example power source includes an input, backup power source, and a backup power source control circuit. The input is configured to be coupled to a primary power source and further configured to couple the primary power source to the output when the input is coupled to the primary power source. The backup power source control circuit is configured to control a current path from the backup power source to the output based at least in part on a voltage applied to the input.

Abstract: Power sources, backup power circuits, power source control circuits, data storage devices, and methods relating to controlling application of power to a node are disclosed. An example power source includes an input, backup power source, and a backup power source control circuit. The input is configured to be coupled to a primary power source and further configured to couple the primary power source to the output when the input is coupled to the primary power source. The backup power source control circuit is configured to control a current path from the backup power source to the output based at least in part on a voltage applied to the input.

Abstract: Pulsed radar detects the presence and range of very short-range objects via small perturbations in phase and/or amplitude of relatively long duration coherently related transmit pulses. In one embodiment, echoes forming a received signal waveform from a sampling baseband radar receiver are processed at audio frequency to look for perturbations of the phase of the time-stretched received radar signal while the radar is still transmitting a long-duration pulse. In a second embodiment, the time-stretched received signal is processed to look for perturbations in the amplitude of the received radar signal. Small amplitude perturbations due to constructive and destructive interference of the transmitted and reflected signals occur in the receiver when objects are very close to the radar if the receiver is not heavily saturated. These same techniques can also be used to achieve highly accurate ranging of long-distance objects and detection of overlapping echoes from multiple objects.

Abstract: The frequency of an RF signal to be transmitted is modulated at the transmitting unit, and the modulation information is used by the receiving unit to filter out any unwanted noise. The modulation information may be used to retrieve associated filter coefficients that are used by the receiver to filter out the noise. Accordingly, for each transmit frequency, a multitude of filter coefficients stored in a memory are applied by the receiver to filter out the noise. The filtering operation may be performed after the received signal is downconverted from an RF to an audio signal.

Abstract: To modulate the frequency of a signal to be transmitted, the biasing voltage applied to a terminal of a transistor is dynamically modulated. To achieve this, the pulse width or a pulse amplitude of a control signal is modulated. Alternatively, a multi-bit control signal may be used to perform the modulation. The frequency of the transmitted signal is optionally modulated by varying the temperature of a oscillator. To vary this temperature, the current flowing through one or more resistive elements positioned in proximity of the oscillator is varied in response to the pulse width or amplitude of a second control signal. The temperature may also be changed by varying a multi-bit control signal. As the level of this current flow varies, the amount of heat emitted by the resistors vary, thereby changing the temperature of the oscillator which has a non-zero temperature coefficient.

Abstract: The frequency of an RF signal to be transmitted is modulated at the transmitting unit, and the modulation information is used by the receiving unit to filter out any unwanted noise. The modulation information may be used to retrieve associated filter coefficients that are used by the receiver to filter out the noise. Accordingly, for each transmit frequency, a multitude of filter coefficients stored in a memory are applied by the receiver to filter out the noise. The filtering operation may be performed after the received signal is downconverted from an RF to an audio signal.

Abstract: Techniques for reducing interference among transceivers are disclosed. A transistor generates a radio frequency transmit signal in response to a generated pulse. The pulse is generated when transitions are detected in a clock signal. The clock signal is produced by an oscillator block which includes a ceramic resonator configured as a clock source. When interference is detected, the pulse applied to the transistor is varied. The frequency of the transmit signal is optionally modulated by varying the temperature of a resonator element. To vary this temperature, the current flowing through one or more resistive elements positioned in proximity of the resonator element is varied according to a control signal. As the level of this current flow varies, the amount of heat emitted by the resistive elements varies, thereby changing the temperature of the resonator element which has a relatively high temperature sensitivity.

Abstract: An arrangement includes a redundant component system and an endsystem linked with the redundant component system. The redundant component system includes a plurality of components such that the total number of components of this plurality is based on a redundant component quantity. To determine the redundant component quantity, a code-based sequence is provided by the present invention. The code-based system may optionally provide an output that includes designs for redundant component systems, each design having a total number of components equal to the redundant component quantity. To operate the component system, a continuous endsystem functionality program sequence is also provided by the present invention. The continuous endsystem functionality program sequence correlates operational or “duty” cycles for each component comprising the redundant component system with fault tolerant characteristics so that at least one component provides functionality to the endsystem at any given time.

Abstract: A method for securing port bypass circuit settings is presented comprising issuing one or more command(s) to one or more inputs of a general purpose input/output (GPIO) system, wherein the command(s) cause a first output of the GPIO system associated with a first input of the multiple inputs to issue a control signal to a latch associated with a port bypass circuit (PBC) addressed in the received command(s), and a second output of the GPIO system associated with a second of the multiple inputs of the GPIO system to issue a clock signal to a latch associated a PBC addressed in the received command(s). If command(s) received at the first and second inputs are consistent with changing the state of a common PBC, the control signal and the clock signal are sent to a single latching device, which latches the control signal to the addressed PBC changing the state of the PBC. If the command(s) are not consistent, the control and clock signal(s) are not received by a common latch, and the PBC states remain unchanged.

Abstract: An electrostatic discharge prevention device enabled latch may be employed on or with an enclosure including an access panel. The electrostatic discharge prevention device enabled latch includes a latch for retaining the access panel in a closed position. The latch may be disengaged by operation of a latch release member which functions to effect release or disengagement of the latch. A conductor receptacle is attached to the enclosure, typically in the proximity of the access panel. An electrostatic discharge prevention device including a ground strap and a conductive terminal are provided for use by an individual desiring to gain access through the access panel to service enclosed components or circuits. When the conductive terminal is inserted into the conductor receptacle, a latch release member is displaced disengaging the latch.

Abstract: A method for securing port bypass circuit settings is presented comprising issuing one or more command(s) to one or more inputs of a general purpose input/output (GPIO) system, wherein the command(s) cause a first output of the GPIO system associated with a first input of the multiple inputs to issue a control signal to a latch associated with a port bypass circuit (PBC) addressed in the received command(s), and a second output of the GPIO system associated with a second of the multiple inputs of the GPIO system to issue a clock signal to a latch associated a PBC addressed in the received command(s). If command(s) received at the first and second inputs are consistent with changing the state of a common PBC, the control signal and the clock signal are sent to a single latching device, which latches the control signal to the addressed PBC changing the state of the PBC. If the command(s) are not consistent, the control and clock signal(s) are not received by a common latch, and the PBC states remain unchanged.

Abstract: A storage area network preferably includes a client device, a data storage device, and at least two data pathways between the client device and the data storage device in which the client device can establish a command path for controlling the data storage device. The client device is configured to establish a new command path in a different pathway upon failure of an existing command path.