Patents by Inventor Todd J. Plum
Todd J. Plum has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11947806Abstract: Methods, systems, and devices for life expectancy monitoring for memory devices are described. A memory device may monitor a parameter of a component of the memory device or the memory device overall, and may determine whether the parameter satisfies a threshold. The parameter may represent or be associated with a lifetime of the component, a level of wear of the component, or an operating parameter violation of the component, or any combination thereof. The memory device may communicate, to a host device, an indication of the parameter satisfying the threshold, and the host device may use the information in the indication to adjust one or more parameters associated with operating the memory device, among other example operations.Type: GrantFiled: October 19, 2021Date of Patent: April 2, 2024Assignee: Micron Technology, Inc.Inventors: Scott E. Schaefer, Aaron P. Boehm, Scott D. Van De Graaff, Todd J. Plum, Mark D. Ingram
-
Patent number: 11580214Abstract: Apparatuses and methods related to logging failed authentication attempts. Failed authentication attempts can be logged in the circuitry by degrading the circuitry. The degradation can signal a fail authentication attempt while an amount of the degradation can represent a timing of the error.Type: GrantFiled: August 27, 2019Date of Patent: February 14, 2023Assignee: Micron Technology, Inc.Inventors: Diana C. Majerus, Scott D. Van De Graaff, Todd J. Plum
-
Publication number: 20220342604Abstract: Methods, systems, and devices for memory device health evaluation at a host device are described. The health evaluation relates to a host device that is associated with a memory device that monitors and reports health information, such as one or more parameters associated with a status of the memory device. The memory device may transmit the health information to the host device, which may perform one or more operations and may transmit the health information to a device of another entity of a system (e.g., ecosystem) including the host device. The host device may include one or more circuits for transmitting and processing the health information, such as a system health engine, a safety engine, a communication component, or a combination thereof. Based on a determination by the host device or information received from an external device, the host device may transmit a command to the memory device.Type: ApplicationFiled: April 19, 2022Publication date: October 27, 2022Inventors: Aaron P. Boehm, Mark D. Ingram, Scott E. Schaefer, Scott D. Van De Graaff, Todd J. Plum
-
Publication number: 20220317916Abstract: Methods, systems, and devices for inter-device communications for memory health monitoring are described. These communications relate to a host device that is associated with a memory device that monitors and reports health information (e.g., one or more parameters associated with a status of the memory device). The memory device may transmit the health information to the host device (e.g., a vehicle or a computer of the vehicle), which may perform one or more operations and transmit the health information to another entity of a system (e.g., ecosystem) including the host device. The host device may additionally or alternatively use the health information. In some cases, the other entity may receive the health information and transmit a signal back to the host device based on the health information. The other entity of the ecosystem may receive the health information and may make a determination based on the health information.Type: ApplicationFiled: March 15, 2022Publication date: October 6, 2022Inventors: Aaron P. Boehm, Mark D. Ingram, Scott E. Schaefer, Scott D. Van De Graaff, Todd J. Plum
-
Patent number: 11456027Abstract: The present disclosure relates generally to semiconductor devices, and, in particular, to monitoring circuitry configured to monitor a signal for an overcurrent, undercurrent, overvoltage, and/or undervoltage condition. The monitor circuit may utilize pull down transistors to generate a local voltage level. The local voltage level is then used to generate an indication of whether the monitored value has diverged from an operating region and/or has crossed a threshold of operation.Type: GrantFiled: November 11, 2020Date of Patent: September 27, 2022Assignee: Micron Technology, Inc.Inventors: Scott D. Van De Graaff, Todd J. Plum
-
Publication number: 20220148641Abstract: The present disclosure relates generally to semiconductor devices, and, in particular, to monitoring circuitry configured to monitor a signal for an overcurrent, undercurrent, overvoltage, and/or undervoltage condition. The monitor circuit may utilize pull down transistors to generate a local voltage level. The local voltage level is then used to generate an indication of whether the monitored value has diverged from an operating region and/or has crossed a threshold of operation.Type: ApplicationFiled: November 11, 2020Publication date: May 12, 2022Inventors: Scott D. Van De Graaff, Todd J. Plum
-
Patent number: 11320479Abstract: An electronic device includes: a detection circuit configured to determine one or more operating data, one or more device sensor data, or a combination thereof associated with operation of the electronic device; a trigger circuit operably coupled to the circuit, the trigger circuit configured to generate a stress input based on detecting one or more target criteria from the one or more operating data, the one or more device sensor data, or a combination thereof; and a degradation sensor operably coupled to the trigger circuit, the degradation sensor having a threshold voltage and being configured to record the target criteria that occurs during operation of the electronic device, wherein the degradation sensor is configured to record the target criteria based on degradation of the threshold voltage according to the stress input.Type: GrantFiled: September 21, 2018Date of Patent: May 3, 2022Assignee: Micron Technology, Inc.Inventors: Todd J. Plum, Scott D. Van De Graaff
-
Publication number: 20210397363Abstract: Methods, systems, and devices for operational monitoring for memory devices are described. Some memory devices may degrade over time, and this degradation may include or refer to a reduction of an ability of the memory device to reliably store, read, process, or communicate information, among other degradation. In accordance with examples as disclosed herein, a memory device may include components configured for monitoring health or life expectancy or both of the memory device, such as components internal to the memory device that identify and store various indications of a duration of operating a memory device. An operational duration stored at the memory device may be used in various operations, such as calculations or comparisons, to evaluate health or life expectancy of the memory device, which may include or be supported by various signaling with a host device.Type: ApplicationFiled: June 11, 2021Publication date: December 23, 2021Inventors: Aaron P. Boehm, Todd J. Plum, Scott D. Van De Graaff, Scott E. Schaefer, Mark D. Ingram
-
Patent number: 11132469Abstract: The present disclosure relates generally to semiconductor devices, and, in particular, to memory devices with a data-recording mechanism. A duration of time that a memory device operates in excess of an operational parameter may be tracked via intentional degradation to a transistor. One or more signals that result from the intentional degradation to the transistor may be leveraged to generate alarms and/or be otherwise used in a memory device control circuit and/or system.Type: GrantFiled: April 17, 2019Date of Patent: September 28, 2021Assignee: Micron Technology, Inc.Inventors: Todd J. Plum, Scott D. Van De Graaff
-
Publication number: 20210064732Abstract: Apparatuses and methods related to logging failed authentication attempts. Failed authentication attempts can be logged in the circuitry by degrading the circuitry. The degradation can signal a fail authentication attempt while an amount of the degradation can represent a timing of the error.Type: ApplicationFiled: August 27, 2019Publication date: March 4, 2021Inventors: Diana C. Majerus, Scott D. Van De Graaff, Todd J. Plum
-
Publication number: 20200334385Abstract: The present disclosure relates generally to semiconductor devices, and, in particular, to memory devices with a data-recording mechanism. A duration of time that a memory device operates in excess of an operational parameter may be tracked via intentional degradation to a transistor. One or more signals that result from the intentional degradation to the transistor may be leveraged to generate alarms and/or be otherwise used in a memory device control circuit and/or system.Type: ApplicationFiled: April 17, 2019Publication date: October 22, 2020Inventors: Todd J. Plum, Scott D. Van De Graaff
-
Publication number: 20200096556Abstract: An electronic device includes: a detection circuit configured to determine one or more operating data, one or more device sensor data, or a combination thereof associated with operation of the electronic device; a trigger circuit operably coupled to the circuit, the trigger circuit configured to generate a stress input based on detecting one or more target criteria from the one or more operating data, the one or more device sensor data, or a combination thereof; and a degradation sensor operably coupled to the trigger circuit, the degradation sensor having a threshold voltage and being configured to record the target criteria that occurs during operation of the electronic device, wherein the degradation sensor is configured to record the target criteria based on degradation of the threshold voltage according to the stress input.Type: ApplicationFiled: September 21, 2018Publication date: March 26, 2020Inventors: Todd J. Plum, Scott D. Van De Graaff