Patents by Inventor Todd L. Brooks
Todd L. Brooks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6798684Abstract: The present invention is directed to methods and systems for evaluating one-time programmable memory cells. A threshold current is applied to a resistive circuit, thereby generating a threshold voltage. A read current is applied to a first memory cell, thereby generating a memory cell voltage. The memory cell voltage is compared to the threshold voltage, thereby determining the state of the memory cell. In a further embodiment of the invention, a second threshold voltage is generated and compared the memory cell voltage, thereby verifying the state of the memory cell. The threshold current is optionally a substantial replica of said read current. The threshold current is optionally a proportional substantial replica of said read current. In an embodiment, the resistive circuit includes a second memory cell, which can be programmed or unprogrammed. The second memory cell is optionally arranged to average the memory cell resistance.Type: GrantFiled: January 31, 2003Date of Patent: September 28, 2004Assignee: Broadcom CorporationInventors: Khim L. Low, Todd L. Brooks, Agnes Woo, Akira Ito
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Patent number: 6771199Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.Type: GrantFiled: April 8, 2003Date of Patent: August 3, 2004Assignee: Broadcom CorporationInventors: Todd L. Brooks, David S. P. Ho, Kevin L. Miller, Eric Fogleman
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Patent number: 6735302Abstract: A CODEC and a SLIC assembly perform current-sensing-voltage synthesis impedance matching and DC feed control functions. Signal processing that does not require high voltage, such as impedance matching and DC feed control, is performed in the digital domain by the CODEC while the SLIC assembly includes high voltage circuitry. This configuration is useful for Voice over Internet Protocol (VOIP) applications with a short subscriber line loop or other long loop applications. The SLIC includes high voltage operational amplifiers (op amps) to drive ring and tip signals. Bipolar transistors are also provided as bias compensating diodes for bias point stabilization over dynamic operating conditions such as temperature. The high voltage op amps include a composite MOSFET-bipolar complimentary symmetry driver stage that offers the bias control and stability of a bipolar device topology and drive capabilities of a power MOSFET device.Type: GrantFiled: May 26, 2000Date of Patent: May 11, 2004Assignee: Broadcom CorporationInventors: Steven L. Caine, Todd L. Brooks
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Patent number: 6727729Abstract: A source-follower transistor based buffer provides high linearity. A replica transistor is used to generate a replica voltage substantially equal to the output voltage of the buffer. The replica voltage is level shifted by a level shift circuit and applied at the drain of the source-follower transistor to improve the linearity of the buffer. The buffer may be used in conjunction with a switched-capacitor sampling circuit. A damping circuit may be used to reduce charge glitches due to sampling. The damping circuit may be a low pass filter. The buffer may be used in an interface circuit that produces an output signal from an input signal and controls the level of the output signal.Type: GrantFiled: September 12, 2001Date of Patent: April 27, 2004Assignee: Broadcom CorporationInventors: Todd L. Brooks, Anilkumar V. Tammineedi
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Publication number: 20040066321Abstract: Methods and systems for improved feedback processing in delta-sigma modulators, including single bit and multi-bit delta-sigma modulators, continuous-time and discrete-time delta-sigma modulators, and digital and/or analog feedback loops. One or more processes are performed in a pipeline having a higher throughput rate than a throughput rate of a delta-sigma modulator. Any of a variety of processes and combinations of processes can be performed in the pipeline including, without limitation, quantization, digital signal processing, and/or feedback digital-to-analog conversion.Type: ApplicationFiled: September 24, 2003Publication date: April 8, 2004Applicant: Broadcom CorporationInventor: Todd L. Brooks
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Publication number: 20040042274Abstract: The present invention is directed to methods and systems for evaluating one-time programmable memory cells. A threshold current is applied to a resistive circuit, thereby generating a threshold voltage. A read current is applied to a first memory cell, thereby generating a memory cell voltage. The memory cell voltage is compared to the threshold voltage, thereby determining the state of the memory cell. In a further embodiment of the invention, a second threshold voltage is generated and compared the memory cell voltage, thereby verifying the state of the memory cell. The threshold current is optionally a substantial replica of said read current. The threshold current is optionally a proportional substantial replica of said read current. In an embodiment, the resistive circuit includes a second memory cell, which can be programmed or unprogrammed. The second memory cell is optionally arranged to average the memory cell resistance.Type: ApplicationFiled: January 31, 2003Publication date: March 4, 2004Inventors: Khim L. Low, Todd L. Brooks, Agnes Woo, Akira Ito
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Publication number: 20040037117Abstract: The present invention relates to systems and methods for programming a memory cell. More specifically, the present invention relates to a controlled application of current to a memory cell. The present invention includes a current mirror configuration having a plurality of transistors that are coupled to the memory cell. A first transistor is coupled between current sources and controls application an amount of current flowing through it. This in turn controls an amount of current that flows through a second transistor that is coupled to the memory cell. In an embodiment, a gate of the first transistor is biased making that transistor susceptible to the current applied by the current sources. In another embodiment, a resistance may be coupled to the first transistor and the current sources applying the current. By varying resistance or voltage biasing the gate of the first transistor, the application of current to the first transistor is controlled.Type: ApplicationFiled: January 31, 2003Publication date: February 26, 2004Inventors: Khim L. Low, Todd L. Brooks, Agnes Woo, Akira Ito
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Publication number: 20040021596Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.Type: ApplicationFiled: April 8, 2003Publication date: February 5, 2004Applicant: Broadcom CorporationInventors: Todd L. Brooks, David S.P Ho, Kevin L. Miller, Eric Fogleman
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Patent number: 6628218Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.Type: GrantFiled: September 12, 2001Date of Patent: September 30, 2003Assignee: Broadcom CorporationInventors: Todd L. Brooks, David S. P. Ho, Kevin L. Miller, Eric Fogleman
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Publication number: 20030156051Abstract: The present invention is directed to a sigma-delta digital to analog converted (DAC) including a digital-sigma delta modulator, a decimation filter, and a multi-bit DAC. The digital sigma-delta modulator receives a digital input signal and produces a quantized digital signal therefrom. The decimation filter receives the quantized digital signal and produces a decimated digital signal therefrom. The multi-bit DAC receives the decimated digital signal and produces an analog output signal therefrom. The analog output signal is representative of the digital input signal.Type: ApplicationFiled: March 6, 2003Publication date: August 21, 2003Applicant: Broadcom CorporationInventors: Todd L. Brooks, David S. P. Ho, Kevin L. Miller
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Patent number: 6577261Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, a range signal is produced based on the digital input code. The range signal specifies which one of a plurality of ranges the digital input code is within. A density code is also produced, preferably, using a shuffling algorithm. The density code specifies a level within the range expressed by the range signal. The range signal and the density code are then combined to produce a plurality of sub-codes, a sum of the plurality of sub-codes equaling the digital input code.Type: GrantFiled: September 12, 2001Date of Patent: June 10, 2003Assignee: Broadcom CorporationInventors: Todd L. Brooks, David S. P. Ho, Kevin L. Miller, Eric Fogleman
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Patent number: 6531973Abstract: The present invention is directed to a sigma-delta digital to analog converted (DAC) including a digital-sigma delta modulator, a decimation filter, and a multi-bit DAC. The digital sigma-delta modulator receives a digital input signal and produces a quantized digital signal therefrom. The decimation filter receives the quantized digital signal and produces a decimated digital signal therefrom. The multi-bit DAC receives the decimated digital signal and produces an analog output signal therefrom. The analog output signal is representative of the digital input signal.Type: GrantFiled: September 12, 2001Date of Patent: March 11, 2003Assignee: Broadcom CorporationInventors: Todd L. Brooks, David S. P. Ho, Kevin L. Miller
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Publication number: 20020080053Abstract: The present invention is directed to a sigma-delta digital to analog converted (DAC) including a digital-sigma delta modulator, a decimation filter, and a multi-bit DAC. The digital sigma-delta modulator receives a digital input signal and produces a quantized digital signal therefrom. The decimation filter receives the quantized digital signal and produces a decimated digital signal therefrom. The multi-bit DAC receives the decimated digital signal and produces an analog output signal therefrom. The analog output signal is representative of the digital input signal.Type: ApplicationFiled: September 12, 2001Publication date: June 27, 2002Inventors: Todd L. Brooks, David S.P. Ho, Kevin L. Miller
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Publication number: 20020070887Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, a range signal is produced based on the digital input code. The range signal specifies which one of a plurality of ranges the digital input code is within. A density code is also produced, preferably, using a shuffling algorithm. The density code specifies a level within the range expressed by the range signal. The range signal and the density code are then combined to produce a plurality of sub-codes, a sum of the plurality of sub-codes equaling the digital input code.Type: ApplicationFiled: September 12, 2001Publication date: June 13, 2002Inventors: Todd L. Brooks, David S. P. Ho, Kevin L. Miller, Eric Fogleman
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Publication number: 20020063647Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.Type: ApplicationFiled: September 12, 2001Publication date: May 30, 2002Inventors: Todd L. Brooks, David S.P Ho, Kevin L. Miller, Eric Fogleman
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Publication number: 20020061012Abstract: A network gateway is configured to facilitate on line and off line bi-directional communication between a number of near end data and telephony devices with far end data termination devices via a hybrid fiber coaxial network and a cable modem termination system. The described network gateway combines a QAM receiver, a transmitter, a DOCSIS MAC, a CPU, a voice and audio processor, a voice synchronizer, an Ethernet MAC, and a USB controller to provide high performance and robust operation.Type: ApplicationFiled: September 12, 2001Publication date: May 23, 2002Inventors: James C. Thi, Theodore F. Rabenko, David Hartman, Robert M. Lukas, Kenneth J. Unger, Ramin Borazjani, Shane P. Lansing, Robert J. Lee, Todd L. Brooks, Kevin L. Miller
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Publication number: 20020053986Abstract: Methods and systems for improved feedback processing in delta-sigma modulators, including single bit and multi-bit delta-sigma modulators, continuous-time and discrete-time delta-sigma modulators, and digital and/or analog feedback loops. One or more processes are performed in a pipeline having a higher throughput rate than a throughput rate of a delta-sigma modulator. Any of a variety of processes and combinations of processes can be performed in the pipeline including, without limitation, quantization, digital signal processing, and/or feedback digital-to-analog conversion.Type: ApplicationFiled: September 12, 2001Publication date: May 9, 2002Applicant: Broadcom CorporationInventor: Todd L. Brooks
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Publication number: 20020032893Abstract: A source-follower transistor based buffer provides high linearity. A replica transistor is used to generate a replica voltage substantially equal to the output voltage of the buffer. The replica voltage is level shifted by a level shift circuit and applied at the drain of the source-follower transistor to improve the linearity of the buffer. The buffer may be used in conjunction with a switched-capacitor sampling circuit. A damping circuit may be used to reduce charge glitches due to sampling. The damping circuit may be a low pass filter. The buffer may be used in an interface circuit that produces an output signal from an input signal and controls the level of the output signal.Type: ApplicationFiled: September 12, 2001Publication date: March 14, 2002Applicant: Broadcom CorporationInventors: Todd L. Brooks, Anilkumar V. Tammineedi
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Patent number: 6124813Abstract: Improved data scramblers and swapper cells and improved digital to analog converters are provided. The improved swapper cells permit data to be propagated through the cell immediately upon receipt. The determination of whether to swap data or pass it directly through is based on a history of data values propagated through the cell, but is independent of the values of the particular inputs being swapped. The data scrambler is structured to permit the possible data inputs on swapper cells in the scrambler to be restricted. A minimum delay data scrambler for use in a fast digital to analog converter is disclosed using these components.Type: GrantFiled: June 6, 1997Date of Patent: September 26, 2000Assignee: Analog Devices, Inc.Inventors: David Robertson, Anthony Del Muro, Steve Harston, Todd L. Brooks
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Patent number: 5982313Abstract: An ADC system includes a sigma-delta modulator that receives an analog input and provides a first digital output and an analog output. An ADC, coupled to the sigma-delta modulator, receives the analog output as an input and provides a second digital output. A digital processor, coupled to the sigma-delta modulator and the ADC, receives the first and second digital outputs and provides a digital representation of the analog input.Type: GrantFiled: June 6, 1997Date of Patent: November 9, 1999Assignee: Analog Devices, Inc.Inventors: Todd L. Brooks, David Robertson