Patents by Inventor Todd L. Cohen

Todd L. Cohen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bitwise rotating scan section for microelectronic chip testing and diagnostics
    Patent number: 10107860
    Abstract: According to an embodiment of the present invention, a computer-implemented method for testing a microelectronic chip is described. The method may include dividing, via a processor running a scanning engine, a plurality of sections of the microelectronic chip. Each of the plurality of sections includes at least two latch sets in at least one scan chain. The method may further include determining, via the processor, based on the dividing, whether each of the plurality of sections fail a data test. The determining comprises interleaving the plurality of sections by scanning, via the processor, an alternating latch set from each scan chain in a first section, and scanning an alternating latch set from each scan chain in a second section.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: October 23, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Todd L. Cohen, Mary P. Kusko, Hari K. Rajeev, Timothy C. Taylor
  • BITWISE ROTATING SCAN SECTION FOR MICROELECTRONIC CHIP TESTING AND DIAGNOSTICS
    Publication number: 20170363684
    Abstract: According to an embodiment of the present invention, a computer-implemented method for testing a microelectronic chip is described. The method may include dividing, via a processor running a scanning engine, a plurality of sections of the microelectronic chip. Each of the plurality of sections includes at least two latch sets in at least one scan chain. The method may further include determining, via the processor, based on the dividing, whether each of the plurality of sections fail a data test. The determining comprises interleaving the plurality of sections by scanning, via the processor, an alternating latch set from each scan chain in a first section, and scanning an alternating latch set from each scan chain in a second section.
    Type: Application
    Filed: June 21, 2016
    Publication date: December 21, 2017
    Inventors: Todd L. Cohen, Mary P. Kusko, Hari K. Rajeev, Timothy C. Taylor