Abstract: The inventions herein are directed to an inventive bus keeper and logic circuit for use with an I/O circuit, for example, for use on the receiver side of the I/O buffer circuit. The inventive circuit connects one data line of an IC function to one line of a tri-state bus (one bit of data per bus line or wire). The bus keeper and logic control circuit is maintained in isolation from I/O functional driver and is responsive to a tri-state signal (TS), normally provided by the IC or SOC, or the I/O circuit during normal I/O receiver side operation. The inventive bus keeper and logic circuit selectively enables any of a tri-state state, a pull-up state, pull-down state and bus keep mode state at the driver output pad in the presence of the tri-state enable signal, and is disabled when the I/O bus drive buffer circuit is in drive mode.

Abstract: The inventions herein are directed to an inventive bus keeper and logic circuit for use with an I/O circuit, for example, for use on the receiver side of the I/O buffer circuit. The inventive circuit connects one data line of an IC function to one line of a tri-state bus (one bit of data per bus line or wire). The bus keeper and logic control circuit is maintained in isolation from I/O functional driver and is responsive to a tri-state signal (TS), normally provided by the IC or SOC, or the I/O circuit during normal I/O receiver side operation. The inventive bus keeper and logic circuit selectively enables any of a tri-state state, a pull-up state, pull-down state and bus keep mode state at the driver output pad in the presence of the tri-state enable signal, and is disabled when the I/O bus drive buffer circuit is in drive mode.