Patents by Inventor Todd Michael Bezenek

Todd Michael Bezenek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems and methods for creating an integrated circuit with a remote device
    Patent number: 10867333
    Abstract: Systems and methods for using logic design processing to create an integrated circuit (IC).
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: December 15, 2020
    Assignee: ARM Finance Overseas Limited
    Inventors: Soumya Banerjee, Todd Michael Bezenek, Clement Tse
  • SYSTEMS AND METHODS FOR CREATING AN INTEGRATED CIRCUIT WITH A REMOTE DEVICE
    Publication number: 20190392500
    Abstract: Systems and methods for using logic design processing to create an integrated circuit (IC).
    Type: Application
    Filed: August 12, 2019
    Publication date: December 26, 2019
    Inventors: Soumya Banerjee, Todd Michael Bezenek, Clement Tse
  • COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS
    Publication number: 20150154677
    Abstract: A software system for facilitating the design process and minimizing the time and effort required to complete the design and fabrication of an integrated circuits (IC) is described. The software system utilizes a data center having a plurality of repositories, rules engines and design and verification tools to automatically produce a hardened GDSII description or other representation of the device in response to the formation of a electronic license agreement. Designers select contractual terms for incorporating third party intellectual property and then design and initiate manufacture of the IC by way of a network portal.
    Type: Application
    Filed: February 9, 2015
    Publication date: June 4, 2015
    Inventors: Soumya Banerjee, Todd Michael Bezenek, Clement Tse
  • System and method for managing the design and configuration of an integrated circuit semiconductor design
    Patent number: 8103987
    Abstract: A system and methods that facilitate the design process and minimize the time and effort required to complete the design and fabrication of an integrated circuits (IC) are described. The system and method utilize a plurality of repositories, rules engines and design and verification tools to analyze the workload and automatically produce a hardened GDSII description or other representation of the device. The system and method securely maintains synthesizable RTL on a server in a data center while providing designers access to portions of the mechanism by way of a network portal.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: January 24, 2012
    Assignee: MIPS Technologies, Inc.
    Inventors: Soumya Banerjee, Todd Michael Bezenek, Clement Tse
  • Remote Interface for Managing the Design and Configuration of an Integrated Circuit Semiconductor Design
    Publication number: 20080222581
    Abstract: A software system for facilitating the design process and minimizing the time and effort required to complete the design and fabrication of an integrated circuits (IC) is described. The software system utilizes a data center having a plurality of repositories, rules engines and design and verification tools to automatically produce a hardened GDSII description or other representation of the device in response to the formation of a electronic license agreement. Designers select contractual terms for incorporating third party intellectual property and then design and initiate manufacture of the IC by way of a network portal.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 11, 2008
    Applicant: MIPS TECHNOLOGIES, INC.
    Inventors: Soumya Banerjee, Todd Michael Bezenek, Clement Tse
  • SYSTEM AND METHOD FOR MANAGING THE DESIGN AND CONFIGURATION OF AN INTEGRATED CIRCUIT SEMICONDUCTOR DESIGN
    Publication number: 20080222580
    Abstract: A system and methods that facilitate the design process and minimize the time and effort required to complete the design and fabrication of an integrated circuits (IC) are described. The system and method utilize a plurality of repositories, rules engines and design and verification tools to analyze the workload and automatically produce a hardened GDSII description or other representation of the device. The system and method securely maintains synthesizable RTL on a server in a data center while providing designers access to portions of the mechanism by way of a network portal.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 11, 2008
    Applicant: MIPS TECHNOLOGIES, INC.
    Inventors: Soumya Banerjee, Todd Michael Bezenek, Clement Tse