Patents by Inventor Todd Rafacz

Todd Rafacz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10866896
    Abstract: Prefetch apparatus and a method of prefetching are presented. The prefetch apparatus monitors access requests, each having an access request address, and has request tracking storage to store region entries for regions of memory space which each span multiple access request addresses. The request tracking storage keeps access information for access requests received in their corresponding region entries. When a new region access request is received, which belongs to a new region for which there is no region entry, and when the request tracking storage has an adjacent region entry for which the access information shows that at least a predetermined number of the access request addresses have been accessed, a page mode region prefetching process is initiated for all access request addresses in the new region.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: December 15, 2020
    Assignee: ARM Limited
    Inventors: Todd Rafacz, Huzefa Sanjeliwala
  • Patent number: 9864694
    Abstract: A cache is provided comprising a plurality of ways, each way of the plurality of ways comprising a data array, wherein a data item stored by the cache is stored in the data array of one of the plurality of ways. A way tracker of the cache has a plurality of entries, each entry of the plurality of entries for storing a data item identifier and for storing, in association with the data item identifier, an indication of a selected way of the plurality of ways to indicate that a data item identified by the data item identifier is stored in the selected way. Each entry of the way tracker is further for storing a miss indicator in association with the data item identifier, wherein the miss indicator is set by the cache when a lookup for a data item identified by that data item identifier has resulted in a cache miss. A corresponding method of caching data is also provided.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: January 9, 2018
    Assignee: ARM Limited
    Inventors: Miles Robert Dooley, Todd Rafacz, Guy Larri
  • Publication number: 20170091104
    Abstract: Prefetch apparatus and a method of prefetching are presented. The prefetch apparatus monitors access requests, each having an access request address, and has request tracking storage to store region entries for regions of memory space which each span multiple access request addresses. The request tracking storage keeps access information for access requests received in their corresponding region entries. When a new region access request is received, which belongs to a new region for which there is no region entry, and when the request tracking storage has an adjacent region entry for which the access information shows that at least a predetermined number of the access request addresses have been accessed, a page mode region prefetching process is initiated for all access request addresses in the new region.
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Inventors: Todd RAFACZ, Huzefa SANJELIWALA
  • Publication number: 20160328320
    Abstract: A cache is provided comprising a plurality of ways, each way of the plurality of ways comprising a data array, wherein a data item stored by the cache is stored in the data array of one of the plurality of ways. A way tracker of the cache has a plurality of entries, each entry of the plurality of entries for storing a data item identifier and for storing, in association with the data item identifier, an indication of a selected way of the plurality of ways to indicate that a data item identified by the data item identifier is stored in the selected way. Each entry of the way tracker is further for storing a miss indicator in association with the data item identifier, wherein the miss indicator is set by the cache when a lookup for a data item identified by that data item identifier has resulted in a cache miss. A corresponding method of caching data is also provided.
    Type: Application
    Filed: May 4, 2015
    Publication date: November 10, 2016
    Inventors: Miles Robert DOOLEY, Todd RAFACZ, Guy LARRI
  • Publication number: 20140108740
    Abstract: A processing system monitors memory bandwidth available to transfer data from memory to a cache. In addition, the processing system monitors a prefetching accuracy for prefetched data. If the amount of available memory bandwidth is low and the prefetching accuracy is also low, prefetching can be throttled by reducing the amount of data prefetched. The prefetching can be throttled by changing the frequency of prefetching, prefetching depth, prefetching confidence levels, and the like.
    Type: Application
    Filed: October 17, 2012
    Publication date: April 17, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Todd Rafacz, Marius Evers, Chitresh Narasimhaiah
  • Publication number: 20120144124
    Abstract: A method and an apparatus for modulating the prefetch training of a memory-side prefetch unit (MS-PFU) are described. An MS-PFU trains on memory access requests it receives from processors and their processor-side prefetch units (PS-PFUs). In the method and apparatus, an MS-PFU modulates its training based on one or more of a PS-PFU memory access request, a PS-PFU memory access request type, memory utilization, or the accuracy of MS-PFU prefetch requests.
    Type: Application
    Filed: December 7, 2010
    Publication date: June 7, 2012
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Kevin M. Lepak, Benjamin Tsien, Todd Rafacz