Abstract: Processor load slew rate may be controlled to help avoid undesirable supply voltage effects such as overshoot or undershoot. A dynamic processor load current budget may be set during each of successive time intervals, and processor activity level may be throttled according to the dynamic processor load current budget.

Abstract: Aspects of the disclosure relate to power management of a system-on-chip (SoC) and techniques of optimizing system performance and power management through power limits coordination via a low latency bus interface that provides a flexible protocol which enables high priority messages to facilitate power management. The protocol enables shallow power mitigation techniques to reduce the need of full mitigation of the apparatus.

Abstract: A method for non-periodic limits mitigation is described. The method includes monitoring operation of each processor thread during thread pipeline execution. The method also includes detecting a limits management condition based on each of the processor threads during the thread pipeline execution. The method further includes controlling application of a limits mitigation operation to perform non-periodic application of the limits mitigation operation to the thread pipeline execution.

Abstract: A method for voltage regulator noise mitigation with processor control is described. The method includes monitoring a power consumption of a sum of processor threads during thread pipeline execution. The method also includes detecting a voltage regulator noise when the power consumption exceeds a slew power threshold. The method further includes controlling slew ramp-up steps of all the processor threads according to a selected throttle control.

Abstract: An apparatus is disclosed for adaptive switch driving. In an example aspect, the apparatus includes a switching circuit configured to selectively be in a first state that provides an input voltage as an output voltage, be in a second state that provides a ground voltage as the output voltage, or be in a third state that causes the output voltage to change from the input voltage to the ground voltage according to a slew rate. The third state enables the switching circuit to transition from the first state to the second state. The switching circuit is also configured to adjust the slew rate of the output voltage for the third state responsive to at least one of the following: a change in a magnitude of a direct-current supply voltage or a change in a magnitude of an input current.

Abstract: An apparatus is disclosed for adaptive switch driving. In an example aspect, the apparatus includes a switching circuit configured to selectively be in a first state that provides an input voltage as an output voltage, be in a second state that provides a ground voltage as the output voltage, or be in a third state that causes the output voltage to change from the input voltage to the ground voltage according to a slew rate. The third state enables the switching circuit to transition from the first state to the second state. The switching circuit is also configured to adjust the slew rate of the output voltage for the third state responsive to at least one of the following: a change in a magnitude of a direct-current supply voltage or a change in a magnitude of an input current.

Abstract: An apparatus is disclosed for adaptive switch driving. In an example aspect, the apparatus includes a switching circuit configured to selectively be in a first state that provides an input voltage as an output voltage, be in a second state that provides a ground voltage as the output voltage, or be in a third state that causes the output voltage to change from the input voltage to the ground voltage according to a slew rate. The third state enables the switching circuit to transition from the first state to the second state. The switching circuit is also configured to adjust the slew rate of the output voltage for the third state responsive to at least one of the following: a change in a magnitude of a direct-current supply voltage or a change in a magnitude of an input current.

Abstract: An apparatus is disclosed for adaptive switch driving. In an example aspect, the apparatus includes a switching circuit configured to selectively be in a first state that provides an input voltage as an output voltage, be in a second state that provides a ground voltage as the output voltage, or be in a third state that causes the output voltage to change from the input voltage to the ground voltage according to a slew rate. The third state enables the switching circuit to transition from the first state to the second state. The switching circuit is also configured to adjust the slew rate of the output voltage for the third state responsive to at least one of the following: a change in a magnitude of a direct-current supply voltage or a change in a magnitude of an input current.

Abstract: An apparatus is disclosed for adaptive switch driving. In an example aspect, the apparatus includes a switching circuit configured to selectively be in a first state that provides an input voltage as an output voltage, be in a second state that provides a ground voltage as the output voltage, or be in a third state that causes the output voltage to change from the input voltage to the ground voltage according to a slew rate. The third state enables the switching circuit to transition from the first state to the second state. The switching circuit is also configured to adjust the slew rate of the output voltage for the third state responsive to at least one of the following: a change in a magnitude of a direct-current supply voltage or a change in a magnitude of an input current.

Abstract: A dual port charging architecture is generally disclosed. For example, the dual charging architecture may include a first board portion having a first battery port configured to be coupled to a first set of battery terminals of a battery, a second board portion having a second battery port configured to be coupled to a second set of battery terminals of the battery, a connection portion electrically coupled between the first board portion and the second board portion, a first power path coupling a power input port of the second board portion to the first battery port via the connection portion, and a second power path coupling the power input port to the second battery port.