Patents by Inventor Todd Sholl

Todd Sholl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System, method and apparatus using at least one flex circuit to connect a printed circuit board and a socket card assembly that are oriented at a right angle to one another
    Patent number: 7717715
    Abstract: There is disclosed apparatus for routing signals between at least one PCB within a test head and a socket card assembly. In an embodiment, the apparatus may include at least one flexible circuit electrically connecting first and second sides of the PCB and the socket card assembly with one another, and the flexible circuit having a defined shape configured to interface with the socket card assembly and the PCB along substantially perpendicular planes. Methods of routing signals between at least one PCB within a test head and a socket card assembly are disclosed. In one embodiment, a method may include electrically connecting first and second sides of the PCB and the socket card assembly with one another with at least one flexible circuit having a defined shape configured to interface with the socket card assembly and the PCB along substantially perpendicular planes. Other embodiments are also disclosed.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: May 18, 2010
    Assignee: Verigy (Singapore) Pte. Ltd.
    Inventors: Sanjeev Grover, Benson Morris, Todd Sholl, Stephen Bellato, Kenneth D. Karklin
  • Right Angle Connection System for ATE Interface
    Publication number: 20080233769
    Abstract: There is disclosed apparatus for routing signals between at least one PCB within a test head and a socket card assembly. In an embodiment, the apparatus may include at least one flexible circuit electrically connecting first and second sides of the PCB and the socket card assembly with one another, and the flexible circuit having a defined shape configured to interface with the socket card assembly and the PCB along substantially perpendicular planes. Methods of routing signals between at least one PCB within a test head and a socket card assembly are disclosed. In one embodiment, a method may include electrically connecting first and second sides of the PCB and the socket card assembly with one another with at least one flexible circuit having a defined shape configured to interface with the socket card assembly and the PCB along substantially perpendicular planes. Other embodiments are also disclosed.
    Type: Application
    Filed: March 20, 2007
    Publication date: September 25, 2008
    Inventors: Sanjeev Grover, Benson Morris, Todd Sholl, Stephen Bellato, Kenneth D. Karklin
  • Parallel calibration system for a test device
    Patent number: 7106081
    Abstract: A parallel calibration system for an electronic circuit tester comprises test and measurement electronics, a test fixture coupled to the test and measurement electronics, the test fixture comprising clock reference circuitry and clock distribution circuitry, a device under test interface, and a plurality of calibration boards coupled to the device under test interface, wherein the plurality of calibration boards and the clock distribution circuitry simultaneously test the signal paths of a plurality of test channels.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: September 12, 2006
    Assignee: Verigy IPco
    Inventors: Romi Mayder, Todd Sholl, Nasser Ali Jafari, Andrew Tse, Randy L. Bailey
  • Parallel calibration system for a test device
    Publication number: 20060006896
    Abstract: A parallel calibration system for an electronic circuit tester comprises test and measurement electronics, a test fixture coupled to the test and measurement electronics, the test fixture comprising clock reference circuitry and clock distribution circuitry, a device under test interface, and a plurality of calibration boards coupled to the device under test interface, wherein the plurality of calibration boards and the clock distribution circuitry simultaneously test the signal paths of a plurality of test channels.
    Type: Application
    Filed: July 8, 2004
    Publication date: January 12, 2006
    Inventors: Romi Mayder, Todd Sholl, Nasser Jafari, Andrew Tse, Randy Bailey