Abstract: An organizer that has a cover that retains therein a removable leather tray, a removable cigarette holder, and a removable storage box. The cover has embedded magnets to removably retain the leather tray, the cigarette holder and the storage box to allow a user to remove each from the cover.

Abstract: A tire-chain hanger system includes a bracket, at least one track-support member, at least one chain-support member and a roller assembly including at least two support-brackets and at least one bearing. The A tire-chain hanger system is useful for providing a sliding tire-chain hanger system for improved tire-chain removal and installation.

Abstract: A terminal assembly configured to conduct current from an external power source to a hermetical motor-compressor unit. The terminal assembly includes a terminal board, at least one opening defined through the thickness of the terminal board, at least a conductive pin received in the opening, and an insulator having a convoluted contour. The insulator may be disposed over the conductive pin and spaced away from the terminal board.

Abstract: A terminal assembly configured to conduct current from an external power source to a hermetical motor-compressor unit. The terminal assembly includes a terminal board, at least one opening defined through the thickness of the terminal board, at least a conductive pin received in the opening, and an insulator having a convoluted contour. The insulator may be disposed over the conductive pin and spaced away from the terminal board.

Abstract: A method and apparatus for providing product information to a potential purchaser of alcoholic beverages while the purchaser is shopping within the context of a retail establishment, including: a step or means for identifying the retail establishment within which the purchaser is physically located; a step or means for displaying to the purchaser a list of alcoholic beverage items offered for sale by the identified retail establishment; and a step or means for displaying product information which describes an alcoholic beverage item selected by the purchaser from the displayed list of items offered for sale; whereby the product information is used by the purchaser to make better, more informed purchasing decisions.

Abstract: Methods and apparatus are provided for efficiently generating test components for testing and evaluating a design under test. As a design is being configured, generated test components are made available. In one example, test components are automatically generated and included in a simulation testbench based on selected components in the design. Generally, the test components complement the selected components in the design. Moreover, the test components can be automatically seeded with initial contents.

Abstract: A system and method is disclosed for testing integrated circuits that contain memory devices. A plurality of test circuits is created in which each test circuit incorporates a physical fault in a memory bit cell. Each of the test circuits generates a distinct electrical signature that is due to presence of the physical fault in the test circuit. The electrical signatures from the test circuits are compared with a signal from an integrated circuit memory device to determine whether any of the physical faults in the test circuits are present in the integrated circuit memory device.

Abstract: Methods and apparatus are provided for testing logic, particularly arbitration logic on a programmable chip. Secondary components on a programmable chip are configured with delay mechanisms operable to pseudo-randomly delay responses to requests received using arbitration logic. Requests are typically generated by primary components. The delay mechanisms can be used to test the ability of a programmable chip system to handle a variety of secondary component wait-state and latency characteristics. The delay mechanism can also be used to improve system performance.

Abstract: Methods and apparatus are provided for implementing a programmable device including a processor core, a hardware accelerator, and secondary components such as memory. A portion of a program written in a high-level language is automatically selected for hardware acceleration. Dedicated ports are generated to allow the hardware accelerator to handle pointer referencing and dereferencing. A hardware accelerator is generated to perform pipelined processing of instructions. The number of stages implemented for pipelined processing is at least partially dependent on the latency associated with accessing secondary components.

Abstract: Methods and apparatus are provided for implementing a programmable device including a processor core and a hardware accelerator. A portion of a program written in a high-level language is automatically selected for hardware acceleration. Dedicated ports are generated to allow the hardware accelerator to handle pointer referencing and dereferencing. Profiling information is used to optimize selection of code for hardware acceleration.

Abstract: Methods and apparatus are provided for interconnecting primary components with secondary components on a programmable chip. Control, data, and address lines are automatically generated to connect primary components and secondary components with an interconnection module. The interconnection connection module manages interaction between primary components and secondary components and provides support for fixed latency and variable latency secondary components.

Abstract: An adjustable low pass filter and directional coupler used in microwave communication are combined to reduce the size of the microwave circuit. The low pass filter portion and coupling portion are made independently tunable with a plurality of varactors and variable reactance circuits connected to ground.

Abstract: Methods and apparatus are provided for efficiently generating test components for testing and evaluating a design under test. As a design is being configured, generated test components are made available. In one example, test components are automatically generated and included in a simulation testbench based on selected components in the design. Generally, the test components complement the selected components in the design. Moreover, the test components can be automatically seeded with initial contents.

Abstract: Methods and apparatus are provided for efficiently generating test components for testing and evaluating a design under test. As a design is being configured, generated test components are made available. In one example, test components are automatically generated and included in a simulation testbench based on selected components in the design. Generally, the test components complement the selected components in the design. Moreover, the test components can be automatically seeded with initial contents.

Abstract: A method is provided for controlling steering oscillations in a work vehicle having a closed loop GPS based automatic steering system, wherein the closed loop steering system has a default gain and a user defined gain. The method causes the system to automatically apply the default gain when an implement is raised and/or when a steering oscillation has been detected and to automatically apply the user defined gain when the implement has been lowered and/or the GPS track has been acquired.

Abstract: A system and method is disclosed for testing integrated circuits that contain memory devices. A plurality of test circuits is created in which each test circuit incorporates a physical fault in a memory bit cell. Each of the test circuits generates a distinct electrical signature that is due to presence of the physical fault in the test circuit. The electrical signatures from the test circuits are compared with a signal from an integrated circuit memory device to determine whether any of the physical faults in the test circuits are present in the integrated circuit memory device.

Abstract: Methods and apparatus are provided for interconnecting on-chip components, such as components on a programmable chip, with off-chip components through a variety of buses, fabrics, and input/output lines. Interconnection resources such as input/output lines are shared for communication with different off-chip components such as memory. Control circuitry and an arbitration fabric are provided to further improve communication efficiency between on-chip and off-chip components.