Patents by Inventor Tohru Hizume

Tohru Hizume has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing semiconductor package
    Patent number: 8153479
    Abstract: A method of manufacturing a semiconductor package comprises: preparing a photosensitive insulating material having a first surface and a second surface opposite to the first surface; bonding a semiconductor chip to the first surface of the photosensitive insulating material with a connecting terminal of the semiconductor chip facing the first surface of the photosensitive insulating material; exposing the second surface of the photosensitive insulating material after the bonding the semi-conductor to the first surface of the photosensitive material; encapsulating the first surface of the photosensitive insulating material, and the semiconductor chip bonded to the first surface, with a resin to form a resin encapsulated portion after exposing the second surface of the photosensitive insulating material; and developing the photosensitive insulating material, thereby forming a through-hole communicating with the connecting terminal of the semiconductor chip in the photosensitive insulating material after the exp
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: April 10, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tohru Hizume, Akihiko Tateiwa
  • METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
    Publication number: 20110045642
    Abstract: A method of manufacturing a semiconductor package comprises: preparing a photosensitive insulating material having a first surface and a second surface opposite to the first surface; bonding a semiconductor chip to the first surface of the photosensitive insulating material with a connecting terminal of the semiconductor chip facing the first surface of the photosensitive insulating material; exposing the second surface of the photosensitive insulating material after the bonding the semi-conductor to the first surface of the photosensitive material; encapsulating the first surface of the photosensitive insulating material, and the semiconductor chip bonded to the first surface, with a resin to form a resin encapsulated portion after exposing the second surface of the photosensitive insulating material; and developing the photosensitive insulating material, thereby forming a through-hole communicating with the connecting terminal of the semiconductor chip in the photosensitive insulating material after the exp
    Type: Application
    Filed: August 18, 2010
    Publication date: February 24, 2011
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Tohru HIZUME, Akihiko Tateiwa
  • Cost-reducing and process-simplifying wiring board and manufacturing method thereof
    Patent number: 6998291
    Abstract: A wiring board is disclosed that includes a first insulating layer, a conductor which is formed on a surface of the first insulating layer, and a second insulating layer which is formed on surfaces of the first insulating layer and of the conductor. The wiring board is provided with a semispherical-shaped or conical-shaped hole-forming portion which penetrates through the second insulating layer into the conductor.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: February 14, 2006
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Shigetsugu Muramatsu, Tohru Hizume
  • Cost-reducing and process-simplifying wiring board and manufacturing method thereof
    Publication number: 20040266060
    Abstract: A wiring board is disclosed that includes a first insulating layer, a conductor which is formed on a surface of the first insulating layer, and a second insulating layer which is formed on surfaces of the first insulating layer and of the conductor. The wiring board is provided with a semispherical-shaped or conical-shaped hole-forming portion which penetrates through the second insulating layer into the conductor.
    Type: Application
    Filed: June 3, 2004
    Publication date: December 30, 2004
    Inventors: Shigetsugu Muramatsu, Tohru Hizume