Patents by Inventor Tohru Watanabe

Tohru Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130110304
    Abstract: Electric-power management system, an area controller transmits, to each of section controllers, information about a target voltage and information about the present voltage, each of the section controllers calculating a difference between the target voltage and the present voltage, received from the area controller, and calculating a power's demand-supply-adjustment request amount based on difference between the information about the voltages, each of facility-equipment controllers transmitting power-reception/power-release capable equipment information to each section controller, being information about a power-reception/power-release capable equipment in a facility into which the facility-equipment controller is installed, the section controller, based on the power-reception/power-release capable equipment information about the equipment, transmitting the equipment's demand-supply-adjustment request amount and the facility-equipment controller transmitting a control signal to the equipment based on the equi
    Type: Application
    Filed: March 16, 2011
    Publication date: May 2, 2013
    Applicant: HITACHI, LTD.
    Inventors: Yasuko Shiga, Tohru Watanabe, Shigeki Hirasawa, Isao Wachi
  • Publication number: 20130055545
    Abstract: A method to align an optical device optically with an interference device is disclosed. The method includes steps of: selecting one of arm waveguides, biasing rest of arm waveguides to cause optical absorption thereat, and aligning the optical device optically with the selected arm waveguide.
    Type: Application
    Filed: August 30, 2012
    Publication date: March 7, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Tohru WATANABE
  • Publication number: 20120228821
    Abstract: A disclosed paper supply unit includes a paper supply cassette having a bottom plate for placing stacked recording media therein and a sending out part. When the paper supply cassette is loaded at a paper supply position, the sending out part faces the bottom plate, the bottom plate is lifted and the recording media come into contact with the sending out part. A support member is rotatably fitted to the paper supply cassette. An elastic member is fastened between the support member and the bottom plate. The support member has plural fastening parts for fastening the elastic member. The elastic force of the elastic member is changeable using the plural fastening parts.
    Type: Application
    Filed: March 6, 2012
    Publication date: September 13, 2012
    Applicant: RICOH COMPANY, LTD.
    Inventors: Yoshinori UCHINO, Tohru Watanabe, Eiji Tachibana
  • Patent number: 8230339
    Abstract: A graphical hierarchical data wheel for displaying hierarchical nodes includes a top level circle on a central axis of the wheel representing a top level node. The wheel further includes a first concentric ring adjacent to the top level circle and comprising a plurality of first level segments, each representing a first level node. The size of each first level segment is proportional to a weight of the corresponding first level node. The wheel further includes a second concentric ring having a larger radius than the first concentric ring and adjacent to the first concentric ring, and comprising a plurality of second level segments, each representing a second level node. The size of each of the second level segments is proportional to the weight of the corresponding second level node. The wheel may include additional concentric rings as needed, and depending on the resolution and size of the display.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: July 24, 2012
    Assignee: Oracle International Corporation
    Inventors: Andrew Tohru Watanabe, Vincent Hardy, Jacques Vigeant
  • Publication number: 20120077172
    Abstract: A digital camera (1) performs shooting such that each student within a classroom is included in a subject, uses an optical flow to detect the action of standing up from a chair or the action of moving a mouth by a student who needs to be a speaker, thus specifies the position of the speaker (any of the students) on a shooting image and extracts image data on the face portion of the speaker. A PC (2) uses a projector (3) to display a material on a screen (4), and superimposes and displays, when the extracted image data is transferred from the digital camera (1), a picture of the face of the speaker on the screen (4) based on the extracted image data.
    Type: Application
    Filed: December 2, 2011
    Publication date: March 29, 2012
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Tohru WATANABE, Ryuhei AMANO, Noboru YOSHINOBE, Masafumi TANAKA, Kiyoko TSUJI, Kazuo ISHIMOTO, Toshio NAKAKUKI, Kaihei KUWATA, Masahiro YOSHIDA
  • Patent number: 8045049
    Abstract: A signal processor for reducing power consumption. The signal processor includes a signal processing circuit and a first regulator connected to the signal processing circuit. The first regulator receives an external regulated voltage from an external regulator connected to the signal processor and generates an internal regulated voltage that is in accordance with an output level of a CCD image sensor. The signal processing circuit operates with the internal regulated voltage and performs a predetermined signal processing on an image signal generated by the CCD image sensor.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: October 25, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Tohru Watanabe, Takashi Tanimoto, Tatsuya Takahashi
  • Publication number: 20110219324
    Abstract: A graphical hierarchical data wheel for displaying hierarchical nodes includes a top level circle on a central axis of the wheel representing a top level node. The wheel further includes a first concentric ring adjacent to the top level circle and comprising a plurality of first level segments, each representing a first level node. The size of each first level segment is proportional to a weight of the corresponding first level node. The wheel further includes a second concentric ring having a larger radius than the first concentric ring and adjacent to the first concentric ring, and comprising a plurality of second level segments, each representing a second level node. The size of each of the second level segments is proportional to the weight of the corresponding second level node. The wheel may include additional concentric rings as needed, and depending on the resolution and size of the display.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 8, 2011
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Andrew Tohru WATANABE, Vincent HARDY, Jacques VIGEANT
  • Patent number: 8004601
    Abstract: An imaging apparatus for reducing power consumption. The apparatus includes a first regulator connected to a signal processing circuit and a second regulator connected to an output circuit. The first regulator generates a first regulated voltage that is in accordance with an output level of a solid-state image sensor. The second regulator generates a second regulated voltage that is in accordance with an input level of an external device.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: August 23, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tohru Watanabe, Takashi Tanimoto, Tatsuya Takahashi
  • Patent number: 7944482
    Abstract: When successively reading out pixel information from an image region, where image pickup devices are arranged two-dimensionally, which is divided into a plurality of sub-regions, a readout unit inserts pixel information on pixels of interest in the respective sub-regions successively at predetermined intervals and reads them out. A control unit generates a frame from the pixel information, on pixels of interest inserted at the predetermined intervals, which has been read out from the readout unit. The control unit grasps a tendency of a picked-up image from the generated frame and performs a predetermined adaptive control according to the grasped tendency.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: May 17, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kuniyuki Tani, Tohru Watanabe
  • Patent number: 7755680
    Abstract: A deficiency candidate detection circuit detects a deficient pixel candidate by comparing the image signal of a target pixel with the image signals of peripheral pixels, and address information of the deficient pixel candidate is stored in a position memory circuit. A deficiency determining circuit repeats the determination of a deficient pixel a number of times based on the address information stored in the position memory circuit, and determines address information of a deficient pixel from the continuity of the determination results. A deficiency registering circuit registers the determined address information in the position memory circuit. A deficiency correction circuit corrects the image signal of the deficient pixel according to the registered address information of the deficient pixel.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: July 13, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Tohru Watanabe
  • Patent number: 7746393
    Abstract: A deficiency candidate detection circuit detects a deficient pixel candidate by comparing the image signal of a target pixel with the image signals of peripheral pixels, and address information of the deficient pixel candidate is stored in a position memory circuit. A deficiency determining circuit repeats the determination of a deficient pixel a number of times based on the address information stored in the position memory circuit, and determines address information of a deficient pixel from the continuity of the determination results. A deficiency registering circuit registers the determined address information in the position memory circuit. A deficiency correction circuit corrects the image signal of the deficient pixel according to the registered address information of the deficient pixel.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: June 29, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Tohru Watanabe
  • Publication number: 20090287530
    Abstract: The invention provides a plan execution control apparatus, a plan execution control method and a plan execution control program capable of giving instructions for sensitively and efficiently maintaining even installations located in a wide range.
    Type: Application
    Filed: May 14, 2009
    Publication date: November 19, 2009
    Inventors: Tohru WATANABE, Hiroyuki HORI
  • Patent number: 7463286
    Abstract: A first processing circuit subjects image data output from an A/D converter circuit to a first signal process to produce first image data. A second processing circuit subjects image data to a second signal process, which is independent of the first signal process, to produce second image data. The first and second processing circuits execute the first and second signal processes in a parallel manner to output the first and second image data to a display device and a system microcomputer.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: December 9, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Tohru Watanabe
  • Publication number: 20080179490
    Abstract: A solid-state image pickup device includes a plurality of optical sensors having different photosensitivity, wherein signals of the optical sensors having prescribed photosensitivity are read in response to object information.
    Type: Application
    Filed: January 31, 2008
    Publication date: July 31, 2008
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Toshikazu OHNO, Tatsushi Ohyama, Tohru Watanabe
  • Publication number: 20080170153
    Abstract: A signal processor for reducing power consumption. The signal processor includes a signal processing circuit and a first regulator connected to the signal processing circuit. The first regulator receives an external regulated voltage from an external regulator connected to the signal processor and generates an internal regulated voltage that is in accordance with an output level of a CCD image sensor. The signal processing circuit operates with the internal regulated voltage and performs a predetermined signal processing on an image signal generated by the CCD image sensor.
    Type: Application
    Filed: March 4, 2008
    Publication date: July 17, 2008
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Tohru Watanabe, Takashi Tanimoto, Tatsuya Takahashi
  • Patent number: 7372500
    Abstract: A signal processor for reducing power consumption. The signal processor includes a signal processing circuit and a first regulator connected to the signal processing circuit. The first regulator receives an external regulated voltage from an external regulator connected to the signal processor and generates an internal regulated voltage that is in accordance with an output level of a CCD image sensor. The signal processing circuit operates with the internal regulated voltage and performs a predetermined signal processing on an image signal generated by the CCD image sensor.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: May 13, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tohru Watanabe, Takashi Tanimoto, Tatsuya Takahashi
  • Patent number: 7365792
    Abstract: A signal processor for reducing power consumption. The signal processor includes a signal processing circuit and an output circuit, which outputs an image signal generated by the signal processing circuit. The signal processor further includes a first regulator for generating a first regulated voltage from a power supply voltage and supplying the first regulated voltage to the signal processing circuit. A second regulator generates a second regulated voltage, which is greater than the first regulated voltage, from the power supply voltage and supplies the second regulated voltage to the output circuit.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: April 29, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tohru Watanabe, Takashi Tanimoto, Tatsuya Takahashi
  • Patent number: 7355640
    Abstract: An image capturing device having a function of clamping an image signal. When the image capturing device is activated, a synchronous signal generating section begins creation of a horizontal synchronous signal, and a counter begins counting a pulse of the horizontal synchronous signal. When the counted value reaches a predetermined value, the clamping capability control section changes the level of a clamp mode signal to an H level. During a period from the start of power supply to the image capturing device to the raising of the level of a clamp mode signal to an H level, a clamp pulse generating section sets a longer width for a clamp pulse than in a normal operation so that a switch element of a clamping circuit remains in an on state in a longer period, whereby a smaller time constant for clamping is set. After elapse of a predetermined period, the switch element is controlled so as to remain in an ON state in a normal period, which is relatively short, whereby a larger time constant for clamping is set.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: April 8, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tatsuya Takahashi, Tohru Watanabe, Osamu Tabata
  • Patent number: 7327392
    Abstract: A signal processing apparatus including a clamp pulse generation circuit for generating a clamp pulse in synchronization with an image signal, a clamp circuit for clamping a signal of a black reference value in response to the clamp pulse, and a defect detection circuit for detecting a defective pixel included in an optical black area, wherein the clamp pulse generation circuit cancels a rise of the clamp pulse when a position of the defective pixel detected by the defect detecting circuit and a position of a rise state of the clamp pulse overlap with each other.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: February 5, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hisashi Matsuyama, Tohru Watanabe
  • Publication number: 20080024631
    Abstract: When successively reading out pixel information from an image region, where image pickup devices are arranged two-dimensionally, which is divided into a plurality of sub-regions, a readout unit inserts pixel information on pixels of interest in the respective sub-regions successively at predetermined intervals and reads them out. A control unit generates a frame from the pixel information, on pixels of interest inserted at the predetermined intervals, which has been read out from the readout unit. The control unit grasps a tendency of a picked-up image from the generated frame and performs a predetermined adaptive control according to the grasped tendency.
    Type: Application
    Filed: July 19, 2007
    Publication date: January 31, 2008
    Inventors: Kuniyuki Tani, Tohru Watanabe