Patents by Inventor Tokihiko Yokoshima

Tokihiko Yokoshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140287287
    Abstract: A battery system 1 includes a secondary battery 10 including a positive electrode 11, a negative electrode 15, and electrolytes 12 and 14, a storing section 23 configured to store peculiar information of the secondary battery 10 measured in advance including an initial resistance value and an evaluation frequency, a power supply section 20 configured to apply an alternating current signal having the evaluation frequency stored in the storing section 23 to the secondary battery 10, a measuring section 22 configured to measure impedance of a solid electrolyte interphase 17 of the secondary battery 10 from the alternating current signal, and a calculating section 24 configured to calculate at least one of a deterioration degree and a charging depth of the secondary battery 10 from the impedance and the peculiar information.
    Type: Application
    Filed: October 10, 2012
    Publication date: September 25, 2014
    Applicant: WASEDA UNIVERSITY
    Inventors: Tetsuya Osaka, Toshiyuki Momma, Tokihiko Yokoshima, Daikichi Mukoyama, Hiroki Nara
  • Publication number: 20140231724
    Abstract: An active material for a lithium secondary battery includes an amorphous and metastable phase which contains silicon, oxygen, and more than 30 at % and 80 at % or less of carbon.
    Type: Application
    Filed: March 23, 2012
    Publication date: August 21, 2014
    Applicant: WASEDA UNIVERSITY
    Inventors: Tetsuya Osaka, Toshiyuki Momma, Tokihiko Yokoshima, Hiroki Nara
  • Patent number: 8399979
    Abstract: An electrode connection structure of a semiconductor chip is provided to realize a highly reliable electrical connection with low stress without using a bump. A conductive member may be used for such an electrode connection structure. A semiconductor device is provided wherein semiconductor chips are arranged in layers without providing the semiconductor chips with a through via, and a method is provided for manufacturing such a semiconductor device. A part or all of the surface of a horizontal recess, which is formed in an adhesive layer arranged between a first electrode of a lower layer and a second electrode of an upper layer, is provided with a conductive member for connecting the first electrode and the second electrode.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: March 19, 2013
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Yasuhiro Yamaji, Tokihiko Yokoshima, Masahiro Aoyagi, Hiroshi Nakagawa, Katsuya Kikuchi
  • Patent number: 8367468
    Abstract: An electrode connection structure of a semiconductor chip is provided to realize a highly reliable electrical connection with low stress without using a bump. A conductive member may be used for such an electrode connection structure. A semiconductor device is provided wherein semiconductor chips are arranged in layers without providing the semiconductor chips with a through via, and a method is provided for manufacturing such a semiconductor device. A part or all of the surface of a horizontal recess, which is formed in an adhesive layer arranged between a first electrode of a lower layer and a second electrode of an upper layer, is provided with a conductive member for connecting the first electrode and the second electrode.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: February 5, 2013
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Yasuhiro Yamaji, Tokihiko Yokoshima, Masahiro Aoyagi, Hiroshi Nakagawa, Katsuya Kikuchi
  • Publication number: 20120108008
    Abstract: An electrode connection structure of a semiconductor chip is provided to realize a highly reliable electrical connection with low stress without using a bump. A conductive member may be used for such an electrode connection structure. A semiconductor device is provided wherein semiconductor chips are arranged in layers without providing the semiconductor chips with a through via, and a method is provided for manufacturing such a semiconductor device. A part or all of the surface of a horizontal recess, which is formed in an adhesive layer arranged between a first electrode of a lower layer and a second electrode of an upper layer, is provided with a conductive member for connecting the first electrode and the second electrode.
    Type: Application
    Filed: April 28, 2011
    Publication date: May 3, 2012
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Yasuhiro Yamaji, Tokihiko Yokoshima, Masahiro Aoyagi, Hiroshi Nakagawa, Katsuya Kikuchi
  • Publication number: 20100044870
    Abstract: An electrode connection structure of a semiconductor chip is provided to realize a highly reliable electrical connection with low stress without using a bump. A conductive member may be used for such an electrode connection structure. A semiconductor device is provided wherein semiconductor chips are arranged in layers without providing the semiconductor chips with a through via, and a method is provided for manufacturing such a semiconductor device. A part or all of the surface of a horizontal recess, which is formed in an adhesive layer arranged between a first electrode of a lower layer and a second electrode of an upper layer, is provided with a conductive member for connecting the first electrode and the second electrode.
    Type: Application
    Filed: July 6, 2007
    Publication date: February 25, 2010
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Yasuhiro Yamaji, Tokihiko Yokoshima, Masahiro Aoyagi, Hiroshi Nakagawa, Katsuya Kikuchi
  • Patent number: 7498520
    Abstract: A silica-based interlayer insulating layer having a low dielectric constant is formed with SOG material on a substrate, in which a wiring-layer forming space is then formed. If necessary, a UV ray irradiation is performed under an oxidizing atmosphere. A Si—OH bond is formed on a surface of the insulating layer. A monomolecular layer film is then adhered to the inner surface of the space, which is then modified to be a catalyst with a solution containing Pd compound. On the catalyst monomolecular layer, a copper-diffusion-resistant film is formed by electroless plating, on which a copper plate is then formed as a wiring layer.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: March 3, 2009
    Assignees: Waseda University, Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Tetsuya Osaka, Tokihiko Yokoshima, Isao Sato, Akira Hashimoto, Yoshio Hagiwara
  • Publication number: 20090029190
    Abstract: A process for producing a perpendicular magnetic recording medium comprises forming metallic nuclei or a seed layer on a non-magnetic substrate, and forming a soft magnetic under layer on the metallic nuclei or the seed layer by means of electroless plating. The soft magnetic under layer is formed while an external parallel magnetic field is applied to the non-magnetic substrate, and the substrate is rotated such that the substrate is maintained parallel to the parallel magnetic field.
    Type: Application
    Filed: September 29, 2008
    Publication date: January 29, 2009
    Applicants: Showa Denko K.K., Waseda University
    Inventors: Masahiro Ohmori, Hiroshi Ohta, Tetsuya Osaka, Toru Asahi, Tokihiko Yokoshima
  • Patent number: 7242553
    Abstract: When a soft magnetic layer for a double layer type perpendicular magnetic recording medium is formed by a plating method, there is the problem of the occurrence of an isolated pulse noise called spike noise so that signal reproduction characteristics are lost. In order to solve this problem, provided are a surface-treated substrate for a magnetic recording medium comprising a substrate having a diameter of not more than 90 mm, and a soft magnetic plating layer comprising an alloy of at least two metals selected from the group consisting of Co, Ni and Fe, which is provided above the substrate, wherein the soft magnetic layer has a coercivity of less than 20 oersted (Oe) in a direction that is parallel to a substrate surface, and wherein a ratio of saturation magnetization to residual magnetization in a direction that is parallel to a surface of the substrate is from 4:1 to 4:3; and a magnetic recording medium comprising the magnetic recording medium substrate.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: July 10, 2007
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tetsuya Osaka, Toru Asahi, Tokihiko Yokoshima, Toshihiro Tsumori
  • Patent number: 7135103
    Abstract: A soft magnetic thin film of CoFe alloy having a high Br and low Hc is prepared by furnishing a plating tank including cathode and anode compartments which are separated by a diaphragm or salt bridge so as to permit charge transfer, but inhibit penetration of Fe ions, feeding a plating solution containing Co ions and divalent Fe ions to the cathode compartment, feeding an electrolyte solution to the anode compartment, immersing a substrate in the plating solution, immersing an anode in the electrolyte solution, electroplating, and heat treating the plated film at 100–550° C.; or by immersing a substrate and a soluble anode in a plating solution containing Co ions and divalent Fe ions, electroplating, and heat treating the plated film at 100–550° C.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: November 14, 2006
    Assignee: Waseda University
    Inventors: Tetsuya Osaka, Tokihiko Yokoshima
  • Publication number: 20050249984
    Abstract: A perpendicular magnetic recording medium includes a non-magnetic substrate, and at least a soft magnetic under layer formed of a soft magnetic material, an alignment-regulating layer for regulating the crystal alignment of a layer provided directly thereon, a perpendicular magnetic layer in which easy-magnetization axes are oriented generally perpendicular to the substrate, and a protective layer, the layers and the layer being provided atop the substrate, wherein the soft magnetic under layer exhibits magnetic isotropy or has easy-magnetization axes oriented perpendicular to the substrate. According to the present invention, an undercoat layer having no magnetic domain walls can be formed. When the undercoat layer is employed, there can be provided a perpendicular magnetic recording medium and a perpendicular magnetic recording and reproducing apparatus which exhibit high thermal stability and excellent noise characteristics, and which attain high-density recording.
    Type: Application
    Filed: May 2, 2005
    Publication date: November 10, 2005
    Inventors: Masahiro Ohmori, Hiroshi Ohta, Tetsuya Osaka, Toru Asahi, Tokihiko Yokoshima
  • Publication number: 20050110149
    Abstract: A silica-based interlayer insulating layer having a low dielectric constant is formed with SOG material on a substrate, in which a wiring-layer forming space is then formed. If necessary, a UV ray irradiation is performed under an oxidizing atmosphere. A Si—OH bond is formed on a surface of the insulating layer. A monomolecular layer film is then adhered to the inner surface of the space, which is then modified to be a catalyst with a solution containing Pd compound. On the catalyst monomolecular layer, a copper-diffusion-resistant film is formed by electroless plating, on which a copper plate is then formed as a wiring layer.
    Type: Application
    Filed: October 18, 2004
    Publication date: May 26, 2005
    Inventors: Tetsuya Osaka, Tokihiko Yokoshima, Isao Sato, Akira Hashimoto, Yoshio Hagiwara
  • Publication number: 20050082171
    Abstract: A soft magnetic thin film of CoFe alloy having a high Br and low Hc is prepared by furnishing a plating tank including cathode and anode compartments which are separated by a diaphragm or salt bridge so as to permit charge transfer, but inhibit penetration of Fe ions, feeding a plating solution containing Co ions and divalent Fe ions to the cathode compartment, feeding an electrolyte solution to the anode compartment, immersing a substrate in the plating solution, immersing an anode in the electrolyte solution, electroplating, and heat treating the plated film at 100-550° C.; or by immersing a substrate and a soluble anode in a plating solution containing Co ions and divalent Fe ions, electroplating, and heat treating the plated film at 100-550° C.
    Type: Application
    Filed: April 5, 2004
    Publication date: April 21, 2005
    Inventors: Tetsuya Osaka, Tokihiko Yokoshima
  • Publication number: 20050057855
    Abstract: When a soft magnetic layer for a double layer type perpendicular magnetic recording medium is formed by a plating method, there is the problem of the occurrence of an isolated pulse noise called spike noise so that signal reproduction characteristics are lost. In order to solve this problem, provided are a surface-treated substrate for a magnetic recording medium comprising a substrate having a diameter of not more than 90 mm, and a soft magnetic plating layer comprising an alloy of at least two metals selected from the group consisting of Co, Ni and Fe, which is provided above the substrate, wherein the soft magnetic layer has a coercivity of less than 20 oersted (Oe) in a direction that is parallel to a substrate surface, and wherein a ratio of saturation magnetization to residual magnetization in a direction that is parallel to a surface of the substrate is from 4:1 to 4:3; and a magnetic recording medium comprising the magnetic recording medium substrate.
    Type: Application
    Filed: September 7, 2004
    Publication date: March 17, 2005
    Inventors: Tetsuya Osaka, Toru Asahi, Tokihiko Yokoshima, Toshihiro Tsumori