Abstract: Synchronization circuitry includes a switcher controlled by a central processing unit to select either received data or an output of the last stage of a shift register to input the selected data to the input of the first stage of the shift register. The central processing unit is able to write test data to the shift register in a short time, so that the shift register can test block synchronization and frame synchronization by shifting CPU data in response to a clock signal. The synchronization circuitry is therefore capable of performing a synchronous operation with a 16-bit shift clock signal, so that it can shorten the time required for design and tests.

Abstract: Synchronization circuitry includes a switcher controlled by a central processing unit to select either received data or an output of the last stage of a shift register to input the selected data to the input of the first stage of the shift register. The central processing unit is able to write test data to the shift register in a short time, so that the shift register can test block synchronization and frame synchronization by shifting CPU data in response to a clock signal. The synchronization circuitry is therefore capable of performing a synchronous operation with a 16-bit shift clock signal, so that it can shorten the time required for design and tests.

Abstract: An array of LEDs is controlled by a control circuit so as to emit light in a write mode and sense light in a read mode. In the read mode, each LED is alternately charged for a first interval, then allowed to discharge by flow of photocurrent for a second interval. At the end of the second interval, just before charging of the LED begins again, the anode voltage of the LED is read by coupling the anode of the LED to an output terminal for a third interval. The third interval of each LED may coincide with the first interval of the preceding LED in tile array, so that each LED is read while the preceding LED is being charged.