Abstract: A musical tone signal generating apparatus has waveform memory WM which stores a plurality of compressed data sets obtained by compressing, by linear prediction, sample values obtained by sampling musical tones. The musical tone signal generating apparatus has cache circuit 740 which reads out compressed data from waveform memory WM within an assigned computing period in response to instructions to generate a musical tone, and decoding circuit 750 which decodes the compressed data and outputs the decoded data as the data indicative of a sample value. The musical tone signal generating apparatus has CPU 901 inputs tone pitch information indicative of a tone pitch of a musical tone which is to be generated, identifies waveform data which is to be read out by cache circuit 740 from waveform memory WM and determines, in accordance with the identified waveform data, the length of the computing period which is to be assigned.

Abstract: A musical tone signal generating apparatus has waveform memory WM which stores a plurality of compressed data sets obtained by compressing, by linear prediction, sample values obtained by sampling musical tones. The musical tone signal generating apparatus has cache circuit 740 which reads out compressed data from waveform memory WM within an assigned computing period in response to instructions to generate a musical tone, and decoding circuit 750 which decodes the compressed data and outputs the decoded data as the data indicative of a sample value. The musical tone signal generating apparatus has CPU 901 inputs tone pitch information indicative of a tone pitch of a musical tone which is to be generated, identifies waveform data which is to be read out by cache circuit 740 from waveform memory WM and determines, in accordance with the identified waveform data, the length of the computing period which is to be assigned.

Abstract: With no interrupt to a CPU, waveform data stored in a NAND-type flash memory are read out on a page-by-page basis to supply a buffer of a waveform memory with waveform sample data. A series of waveform data are prestored in successive pages of the intermediate buffer capable of high-speed page access thereto. Page number of a page to be read out first is set, and that page is read into a buffer in advance. Before completion of readout of the first page, another page to be read out next is loaded into the buffer. After that, the page number is incremented by one each time readout of one page is completed, and the waveform sample data of the page number continue to be reproduced while being read into the buffer.

Abstract: With no interrupt to a CPU, waveform data stored in a NAND-type flash memory are read out on a page-by-page basis to supply a buffer of a waveform memory with waveform sample data. A series of waveform data are prestored in successive pages of the intermediate buffer capable of high-speed page access thereto. Page number of a page to be read out first is set, and that page is read into a buffer in advance. Before completion of readout of the first page, another page to be read out next is loaded into the buffer. After that, the page number is incremented by one each time readout of one page is completed, and the waveform sample data of the page number continue to be reproduced while being read into the buffer.

Abstract: Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

Abstract: Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits.

Abstract: Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

Abstract: Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

Abstract: Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

Abstract: Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

Abstract: An electronic component taken out from a component storage section by a transfer head is held by suction, transferred and inspected as to whether it is good or defective by a good/defective component inspecting device. Thereafter, the electronic component is delivered to an alignment suction nozzle on a component alignment section. The sequence of the above-operations is then repeated, whereby the electronic components inspected and then aligned in the order of mounting can be supplied to a mounting head. Therefore, a mount time for the electronic components in a mount process is greatly shortened, so that productivity is expected to be improved. The electronic components can also be inspected before being aligned in the order of mounting, which further enhances mount efficiency.

Abstract: Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

Abstract: An apparatus includes a component storage device, a transfer head, a component alignment section, and a mounting head. The component storage device houses a plurality of lattice-shaped trays on which electronic components are stored, and can select and eject one of the trays along an ejection direction. The transfer head can move an electronic component from the tray along a first transfer path, while the component alignment section can move the electronic component along a second transfer path. The mounting head can then mount the electronic component on a circuit board.

Abstract: An electronic component taken out from a component storage section by a transfer head is held by suction, transferred and inspected as to whether it is good or defective by a good/defective component inspecting device. Thereafter, the electronic component is delivered to an alignment suction nozzle on a component alignment section. The sequence of the above-operations is then repeated, whereby the electronic components inspected and then aligned in the order of mounting can be supplied to a mounting head. Therefore, a mount time for the electronic components in a mount process is greatly shortened, so that productivity is expected to be improved. The electronic components can also be inspected before being aligned in the order of mounting, which further enhances mount efficiency.

Abstract: An electronic component taken out from a component storage section by a transfer head is held by suction, transferred and inspected as to whether it is good or defective by a good/defective component inspecting device. Thereafter, the electronic component is delivered to an alignment suction nozzle on a component alignment section. The sequence of the above-operations is then repeated, whereby the electronic components inspected and then aligned in the order of mounting can be supplied to a mounting head. Therefore, a mount time for the electronic components in a mount process is greatly shortened, so that productivity is expected to be improved. The electronic components can also be inspected before being aligned in the order of mounting, which further enhances mount efficiency.

Abstract: This invention provides an electronic component sucking method in which the movement of a component supply table (15) can be increased without increasing tact time, thereby improving the mounting efficiency of electronic components (2, 4). According to this invention, the movement disabled period of the component supply table (15) is set on the basis of the height of an electronic component (2, 4) in order that the interlock time for a low electronic component (4) can be set to be shorter and the movement enabled period of the component supply table (15) can be set to be longer. Therefore, a low electronic component (4) can have a shorter tact time, thereby improving the overall mounting efficiency of electronic components.

Abstract: A control circuit is integrated in a semiconductor chip for controlling operation of an electronic musical instrument according to a custom program stored in an external memory so as to generate a musical tone. In the control circuit, an internal memory is formed in the semiconductor chip separately from the external memory for permanently storing a common program which is dedicated to synthesis of the musical tone while the custom program stored in the external memory is customized for the operation of the electronic musical instrument. A tone synthesizer is formed in the same semiconductor chip for synthesizing -,he musical tone when the common program is executed.

Abstract: In a sound source apparatus, a central processing unit is integrated in a semiconductor chip and operates in response to a primary operating clock signal for creating a control message. A tone generating unit is integrated in the same semiconductor chip and operates in response to a secondary operating clock signal for generating a musical tone according to the control message. A master clock generator generates a master clock signal having a desired frequency selected from a plurality of frequencies. A mode changer designates one of a first mode and a second mode corresponding to different operating speeds. A clock generator is provided for variably frequency-dividing the master clock signal to generate the primary operating clock signal and the secondary operating clock signal. The clock generator is responsive to the mode changer for changing a frequency ratio of the primary operating clock signal to the secondary operating clock signal between the first mode and the second mode.

Abstract: Reading of a waveform memory is controlled and one of different processing is performed depending upon which of a first mode and a second mode has been designated. When the first mode has been designated, an interpolation operation is performed on the basis of plural sample value data read from the waveform memory by using a predetermined number of processing time slots and a resulting one waveform sample value data is produced. When the second mode, has been designated, a processing for producing one waveform sample value data is performed on the basis of one sample value data read from the waveform memory by using one processing time slot. By using a predetermined plural number of processing time slots, one waveform sample value data produced with a high accuracy in the first mode whereas plural waveform sample value data are produced in the second mode whereby generation of a waveform can be performed efficiently by properly utilizing the mode.

Abstract: An addition section and a memory section for storing data to be inputted to the addition section are provided. A processing section variably performs a logical processing on output data of the memory section in accordance with a control signal and gives the data to the addition section. A control section controls introduction of data to the memory section and supply of the control signal to the processing section in correspondence to respective desired operations so that plural kinds of operations for tone signal generation may be respectively performed. With this arrangement, the addition section can be shared for various kinds of operations for the tone signal generation. Consequently, operation circuits for performing the various operations are integrated, so as to realize a substantial reduction of circuitry construction.