Patents by Inventor Tokio Takei
Tokio Takei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7727860Abstract: The present invention provides a method for manufacturing a bonded wafer, which includes at least the steps of bonding a bond wafer and a base wafer, grinding an outer peripheral portion of the bonded bond wafer, etching off an unbonded portion of the ground bond wafer, and then reducing a thickness of the bond wafer, wherein, in the step of grinding the outer peripheral portion, the bonded bond wafer is ground so as to form a groove along the outer peripheral portion of the bond wafer to form an outer edge portion outside the groove; and in the subsequent step of etching, the outer edge portion is removed together with the groove portion of the bond wafer to form a terrace portion where the base wafer is exposed at the outer peripheral portion of the bonded wafer. Thus, it is possible to provide a method for manufacturing a bonded wafer, which can reduce the number of dimples formed in a terrace portion of a base wafer upon removing an outer peripheral portion of a bonded bond wafer.Type: GrantFiled: May 18, 2006Date of Patent: June 1, 2010Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Susumu Miyazaki, Tokio Takei, Keiichi Okabe
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Publication number: 20090233109Abstract: The present invention is a method for producing a bonded wafer, comprising at least: bonding a base wafer serving as a support substrate to a bond wafer made of a silicon single crystal via an insulator film or directly bonding the wafers to provide a bonded wafer; and reducing a thickness of the bond wafer to form a thin film made of the silicon single crystal on the base wafer, wherein the thickness of the bonded wafer is reduced based on at least surface grinding while measuring the thickness of the bond wafer, and surface grinding with respect to the bond wafer is stopped when the thickness of the bond wafer reaches a target thickness. As a result, the method for producing a bonded wafer enabling a silicon single crystal thin film to precisely have a desired film thickness, a bonded wafer, and a surface grinding machine enabling a silicon single crystal thin film to precisely have a desired film thickness are provided.Type: ApplicationFiled: March 29, 2006Publication date: September 17, 2009Applicant: SHIN-ETSU HANDOTAI CO., LDT.Inventors: Keiichi Okabe, Yoshikazu Tachikawa, Susumu Miyazaki, Sigeyuki Yoshizawa, Tokio Takei
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Publication number: 20090042363Abstract: The present invention provides a method for manufacturing a bonded wafer, which includes at least the steps of bonding a bond wafer and a base wafer, grinding an outer peripheral portion of the bonded bond wafer, etching off an unbonded portion of the ground bond wafer, and then reducing a thickness of the bond wafer, wherein, in the step of grinding the outer peripheral portion, the bonded bond wafer is ground so as to form a groove along the outer peripheral portion of the bond wafer to form an outer edge portion outside the groove; and in the subsequent step of etching, the outer edge portion is removed together with the groove portion of the bond wafer to form a terrace portion where the base wafer is exposed at the outer peripheral portion of the bonded wafer. Thus, it is possible to provide a method for manufacturing a bonded wafer, which can reduce the number of dimples formed in a terrace portion of a base wafer upon removing an outer peripheral portion of a bonded bond wafer.Type: ApplicationFiled: May 18, 2006Publication date: February 12, 2009Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Susumu Miyazaki, Tokio Takei, Keiichi Okabe
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Publication number: 20080315349Abstract: The present invention provides a method for manufacturing a bonded wafer prepared by bonding a base wafer and a bond wafer, comprising at least a step of etching an oxide film in a terrace region in an outer periphery of the bonded wafer wherein the oxide film in the terrace region is etched by spin-etching with holding and spinning the bonded wafer. Thereby, there is provided a method for manufacturing a bonded wafer in which an oxide film formed in a terrace region of a base wafer is efficiently etched without removing an oxide film on the back surface of the base wafer.Type: ApplicationFiled: November 2, 2005Publication date: December 25, 2008Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Tokio Takei, Sigeyuki Yoshizawa, Susumu Miyazaki, Isao Yokokawa, Nobuhiko Noto
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Patent number: 6583029Abstract: There are provided a method for manufacturing a mirror polished wafer with little polishing sag (peripheral sag) by a relatively easy method, a method for manufacturing a bonded wafer having an SOI layer or a bond layer which has no periphery removing region or reduces it, and a bonded wafer thereof. There is prepared a silicon wafer having chamfered portions in which when the chamfering width of the front surface side of the silicon wafer is X1 and the chamfering width of the back surface side thereof is X2, X1<X2, the front surface of the silicon wafer is mirror polished, and the front surface side thereof is chamfered again so that the chamfering width thereof is X3 (X3>X1).Type: GrantFiled: November 28, 2001Date of Patent: June 24, 2003Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Takao Abe, Tokio Takei, Keiichi Okabe, Hajime Miyajima
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Publication number: 20030008478Abstract: There are provided a method for manufacturing a mirror polished wafer with little polishing sag (peripheral sag) by a relatively easy method, a method for manufacturing a bonded wafer having an SOI layer or a bond layer which has no periphery removing region or reduces it, and a bonded wafer thereof.Type: ApplicationFiled: November 28, 2001Publication date: January 9, 2003Inventors: Takao Abe, Tokio Takei, Keichi Okabe, Hajime Miyajima
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Patent number: 6110391Abstract: A method of manufacturing a bonding substrate is disclosed. An oxide film is formed on at least one of two semiconductor substrates, and the two substrates are brought into close contact with each other via the oxide film. The substrates are heat-treated in an oxidizing atmosphere in order to firmly join the substrates together. Subsequently, the peripheral portion of a device-fabricating substrate is ground to a predetermined thickness, and an unjoined portion at the periphery of the device-fabricating substrate is completely removed through etching. The device-fabricating substrate is then ground and/or polished in order to reduce the thickness of the device-fabricating substrate to a desired thickness. The step of grinding the peripheral portion of the device-fabricating substrate to a predetermined thickness is performed by relative and radial movement of a grinding stone from the peripheral portion of the substrate toward the center thereof.Type: GrantFiled: December 29, 1997Date of Patent: August 29, 2000Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Tokio Takei, Susumu Nakamura, Kazushi Nakazawa
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Patent number: 5938512Abstract: There is disclosed a wafer holding jig having a porous holding surface for vacuum-holding a semiconductor wafer while the wafer is ground or polished. The porosity of a center region of the holding surface is made larger than that of an outside region formed to surround the center region. The outer diameter of the center region is made less than that of the wafer, while the outer diameter of the outside region is made greater than that of the wafer. It is possible to prevent deterioration in machining accuracy, which deterioration would otherwise occur due to deformation of a wafer stemming from catch of dust or the like, or application of machining pressure to the wafer.Type: GrantFiled: December 16, 1997Date of Patent: August 17, 1999Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Tokio Takei, Susumu Nakamura
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Patent number: 5340435Abstract: A bonded wafer comprising a filmy bond wafer, a base wafer, and an intermediate silicon dioxide layer, wherein the periphery of the bond wafer is etched; this bonded wafer is made by: subjecting the bond wafer to an oxidation treatment to form an oxide film over it; joining the two wafers in a manner such that the oxide film-covered face of the bond wafer is put on the base wafer to thereby sandwich the oxide film between the wafers; heating the combined wafers to thereby create a bonding strength between the two wafers; grinding the exposed face of the bond; etching the periphery of the bond wafer to remove the portion which is not in contact with the base wafer; and polishing the exposed face of the bond wafer until it becomes a thin film.Type: GrantFiled: January 5, 1993Date of Patent: August 23, 1994Inventors: Yatsuo Ito, Takao Abe, Tokio Takei, Susumu Nakamura, Hiroko Ota
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Patent number: 5071785Abstract: A new method of preparing an exceedingly flat substrate for forming semiconductor devices having an SOI structure is disclosed.In this process at least a first wafer made of silicon single crystal is concavely warped beforehand. A second silicon single crystal wafer is bonded to the concavely warped side of the first wafer with an oxide film interposed between the first and the second wafers. Subsequently the wafers are subjected to polishing and/or etching so that the second wafer bonded is thinned into a thin film to prepare a substrate for forming semiconductor devices having a SOI structure.At this time the polishing and/or etching cause the bonded wafers to be warped convexly to offset the concavity of the first wafer, resulting in realization of a precisely flat substrate for forming semiconductor devices having an SOI structure.Type: GrantFiled: July 25, 1990Date of Patent: December 10, 1991Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Yasuaki Nakazato, Tokio Takei