Patents by Inventor Tokiyoshi Matsuda

Tokiyoshi Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11670688
    Abstract: The disclosure provides a semiconductor apparatus capable of keeping a semiconductor characteristics and realizing excellent semiconductor properties even when using an n type semiconductor (gallium oxide, for example) having a low loss at a high voltage and having much higher dielectric breakdown electric field strength than SiC. A semiconductor apparatus includes a gate electrode and a channel layer formed of a channel directly or through other layers on a side wall of the gate electrode, and wherein a portion of or whole the channel layer may be a p type oxide semiconductor (iridium oxide, for example).
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: June 6, 2023
    Assignee: FLOSFIA INC.
    Inventors: Tokiyoshi Matsuda, Masahiro Sugimoto, Takashi Shinohe
  • Patent number: 11594601
    Abstract: A semiconductor apparatus capable of reducing the leakage current in the reverse direction, and keeping characteristics thereof, even when using n type semiconductor (gallium oxide, for example) or the like having a low-loss at a high voltage and having much higher dielectric breakdown electric field strength than SiC is provided. A semiconductor apparatus includes a crystalline oxide semiconductor having a corundum structure as a main component, and an electric field shield layer and a gate electrode that are respectively laminated directly or through other layers on the n type semiconductor layer, wherein the electric field shield layer includes a p type oxide semiconductor, and is embedded in the n type semiconductor layer deeper than the gate electrode.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: February 28, 2023
    Assignee: FLOSFIA INC.
    Inventors: Tokiyoshi Matsuda, Masahiro Sugimoto, Takashi Shinohe
  • Patent number: 11233129
    Abstract: The disclosure provides a semiconductor apparatus capable of keeping a semiconductor characteristics and realizing excellent semiconductor properties even when using an n type semiconductor (gallium oxide, for example) having a low loss at a high voltage and having much higher dielectric breakdown electric field strength than SiC. A semiconductor apparatus including at least an n type semiconductor layer and a p+ type semiconductor layer, wherein the n type semiconductor layer includes a crystalline oxide semiconductor (gallium oxide, for example) containing a metal of Group 13 of the periodic table as a main component, and the p+ type semiconductor layer includes a crystalline oxide semiconductor (iridium oxide, for example) containing a metal of Group 9 of the periodic table as a main component.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: January 25, 2022
    Assignee: FLOSFIA INC.
    Inventors: Tokiyoshi Matsuda, Isao Takahashi, Takashi Shinohe
  • Patent number: 11088242
    Abstract: As an aspect of an embodiment, a crystal contains a metal oxide containing Ga and Mn and having a corundum structure.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: August 10, 2021
    Assignee: FLOSFIA INC.
    Inventors: Tokiyoshi Matsuda, Takahiro Sasaki, Toshimi Hitora, Isao Takahashi
  • Publication number: 20210143251
    Abstract: As an aspect of an embodiment, a crystal contains a metal oxide containing Ga and Mn and having a corundum structure.
    Type: Application
    Filed: March 30, 2020
    Publication date: May 13, 2021
    Inventors: Tokiyoshi MATSUDA, Takahiro SASAKI, Toshimi HITORA, Isao TAKAHASHI
  • Patent number: 10930743
    Abstract: In a first aspect of a present inventive subject matter, a layered structure includes a first semiconductor layer including an ?-phase crystalline oxide semiconductor with a first composition, and a second semiconductor layer including an ?-phase crystalline oxide semiconductor with a second composition that is different from the first composition of the first semiconductor layer, and the second semiconductor layer is layered on the first semiconductor layer.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: February 23, 2021
    Assignee: FLOSFIA INC.
    Inventors: Tokiyoshi Matsuda, Takashi Shinohe, Toshimi Hitora
  • Publication number: 20200403070
    Abstract: A semiconductor apparatus capable of reducing the leakage current in the reverse direction, and keeping characteristics thereof, even when using n type semiconductor (gallium oxide, for example) or the like having a low-loss at a high voltage and having much higher dielectric breakdown electric field strength than SiC is provided. A semiconductor apparatus includes a crystalline oxide semiconductor having a corundum structure as a main component, and an electric field shield layer and a gate electrode that are respectively laminated directly or through other layers on the n type semiconductor layer, wherein the electric field shield layer includes a p type oxide semiconductor, and is embedded in the n type semiconductor layer deeper than the gate electrode.
    Type: Application
    Filed: November 15, 2018
    Publication date: December 24, 2020
    Applicant: FLOSFIA INC.
    Inventors: Tokiyoshi MATSUDA, Masahiro SUGIMOTO, Takashi SHINOHE
  • Publication number: 20200395450
    Abstract: The disclosure provides a semiconductor apparatus capable of keeping a semiconductor characteristics and realizing excellent semiconductor properties even when using an n type semiconductor (gallium oxide, for example) having a low loss at a high voltage and having much higher dielectric breakdown electric field strength than SiC. A semiconductor apparatus includes a gate electrode and a channel layer formed of a channel directly or through other layers on a side wall of the gate electrode, and wherein a portion of or whole the channel layer may be a p type oxide semiconductor (iridium oxide, for example).
    Type: Application
    Filed: November 15, 2018
    Publication date: December 17, 2020
    Inventors: Tokiyoshi MATSUDA, Masahiro SUGIMOTO, Takashi SHINOHE
  • Publication number: 20200395449
    Abstract: The disclosure provides a semiconductor apparatus capable of keeping a semiconductor characteristics and realizing excellent semiconductor properties even when using an n type semiconductor (gallium oxide, for example) having a low loss at a high voltage and having much higher dielectric breakdown electric field strength than SiC. A semiconductor apparatus including at least an n type semiconductor layer and a p+ type semiconductor layer, wherein the n type semiconductor layer includes a crystalline oxide semiconductor (gallium oxide, for example) containing a metal of Group 13 of the periodic table as a main component, and the p+ type semiconductor layer includes a crystalline oxide semiconductor (iridium oxide, for example) containing a metal of Group 9 of the periodic table as a main component.
    Type: Application
    Filed: November 15, 2018
    Publication date: December 17, 2020
    Inventors: Tokiyoshi MATSUDA, Isao TAKAHASHI, Takashi SHINOHE
  • Patent number: 10770553
    Abstract: In a first aspect of a present inventive subject matter, a layered structure includes a first semiconductor layer containing as a major component an ?-phase oxide semiconductor crystal; and a second semiconductor layer positioned on the first semiconductor layer and containing as a major component an oxide semiconductor crystal with a tetragonal crystal structure.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: September 8, 2020
    Assignee: FLOSFIA INC.
    Inventors: Tokiyoshi Matsuda, Takashi Shinohe, Shingo Yagyu, Takuto Igawa
  • Publication number: 20200279955
    Abstract: An industrially useful p-type oxide semiconductor with an enhanced semiconductor characteristic and a method of forming the p-type oxide semiconductor is provided. By using a metal oxide (for example, iridium oxide) gas as a raw material and conducting a crystal growth on a base with a corundum structure (for example, a sapphire substrate) until a film thickness to be equal to or more than 50 nm, a p-type oxide semiconductor film with a corundum structure includes a film thickness of equal to or more than 50 nm and a surface roughness of equal to or less than 10 nm is obtained.
    Type: Application
    Filed: November 15, 2018
    Publication date: September 3, 2020
    Inventors: Isao TAKAHASHI, Tokiyoshi MATSUDA, Takashi SHINOHE
  • Patent number: 10580648
    Abstract: In a first aspect of a present inventive subject matter, a semiconductor device includes a first semiconductor layer that is an electron-supply layer containing as a major component a first semiconductor crystal with a metastable crystal structure; and a second semiconductor layer that is an electron-transit layer containing as a major component a second semiconductor crystal with a hexagonal crystal structure. The first semiconductor crystal contained in the first semiconductor layer is different in composition from the second semiconductor crystal comprised in the second semiconductor layer.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: March 3, 2020
    Assignees: FLOSFIA INC., KYOTO UNIVERSITY
    Inventors: Riena Jinno, Shizuo Fujita, Kentaro Kaneko, Tokiyoshi Matsuda, Takashi Shinohe, Toshimi Hitora
  • Patent number: 10460934
    Abstract: According to an aspect of a present inventive subject matter, a crystalline film includes a crystalline metal oxide as a major component, the crystalline film includes a corundum structure, a surface area that is 9 ?m2 or more, and a dislocation density that is less than 5×106 cm?2.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: October 29, 2019
    Assignees: FLOSFIA INC., NATIONAL INSTITUTE FOR MATERIALS SCIENCE, KYOTO UNIVERSITY, SAGA UNIVERSITY
    Inventors: Yuichi Oshima, Shizuo Fujita, Kentaro Kaneko, Makoto Kasu, Katsuaki Kawara, Takashi Shinohe, Tokiyoshi Matsuda, Toshimi Hitora
  • Publication number: 20190103465
    Abstract: In a first aspect of a present inventive subject matter, a layered structure includes a first semiconductor layer containing as a major component an ?-phase oxide semiconductor crystal; and a second semiconductor layer positioned on the first semiconductor layer and containing as a major component an oxide semiconductor crystal with a tetragonal crystal structure.
    Type: Application
    Filed: September 27, 2018
    Publication date: April 4, 2019
    Inventors: Tokiyoshi MATSUDA, Takashi SHINOHE, Shingo YAGYU, Takuto IGAWA
  • Publication number: 20190074178
    Abstract: In a first aspect of a present inventive subject matter, a semiconductor device includes a first semiconductor layer that is an electron-supply layer containing as a major component a first semiconductor crystal with a metastable crystal structure; and a second semiconductor layer that is an electron-transit layer containing as a major component a second semiconductor crystal with a hexagonal crystal structure. The first semiconductor crystal contained in the first semiconductor layer is different in composition from the second semiconductor crystal comprised in the second semiconductor layer.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 7, 2019
    Inventors: Riena JINNO, Shizuo FUJITA, Kentaro KANEKO, Tokiyoshi MATSUDA, Takashi SHINOHE, Toshimi HITORA
  • Publication number: 20190057865
    Abstract: According to an aspect of a present inventive subject matter, a crystalline film includes a crystalline metal oxide as a major component, the crystalline film includes a corundum structure, a surface area that is 9 ?m2 or more, and a dislocation density that is less than 5×106cm?2.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 21, 2019
    Inventors: Yuichi OSHIMA, Shizuo FUJITA, Kentaro KANEKO, Makoto KASU, Katsuaki KAWARA, Takashi SHINOHE, Tokiyoshi MATSUDA, Toshimi HITORA
  • Publication number: 20190055646
    Abstract: According to an aspect of a present inventive subject matter, a method for producing a crystalline film includes gasifying a metal source to turn the metal source into a metal-containing raw-material gas; supplying the metal-containing raw-material gas and an oxygen-containing raw-material gas into a reaction chamber onto a substrate; and supplying a reactive gas into the reaction chamber onto the substrate to form a crystalline film under a gas flow of the reactive gas.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 21, 2019
    Inventors: Yuichi OSHIMA, Katsuaki KAWARA, Takashi SHINOHE, Tokiyoshi MATSUDA, Toshimi HITORA
  • Publication number: 20190057866
    Abstract: According to an aspect of a present inventive subject matter, a crystal includes: a corundum-structured oxide semiconductor as a major component, the corundum-structured oxide semiconductor including gallium and/or indium and doped with a dopant including germanium; a principal plane; a carrier concentration that is 1×1018/cm3 or more; and an electron mobility that is 20 cm2/Vs or more.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 21, 2019
    Inventors: Yuichi OSHIMA, Shizuo FUJITA, Kentaro KANEKO, Makoto KASU, Katsuaki KAWARA, Takashi SHINOHE, Tokiyoshi MATSUDA, Toshimi HITORA
  • Publication number: 20190055667
    Abstract: According to an aspect of a present inventive subject matter, a method for producing a crystalline film includes; gasifying a metal source containing a metal to turn the metal source into a metal-containing raw-material gas; supplying the metal-containing raw-material gas and an oxygen-containing raw-material gas into a reaction chamber onto a substrate including a buffer layer; and supplying a reactive gas into the reaction chamber onto the substrate to form a crystalline film on the substrate under a gas flow of the reactive gas.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 21, 2019
    Inventors: Yuichi OSHIMA, Shizuo FUJITA, Kentaro KANEKO, Makoto KASU, Katsuaki KAWARA, Takashi SHINOHE, Tokiyoshi MATSUDA, Toshimi HITORA
  • Publication number: 20190006472
    Abstract: In a first aspect of a present inventive subject matter, a layered structure includes a first semiconductor layer including an ?-phase crystalline oxide semiconductor with a first composition, and a second semiconductor layer including an ?-phase crystalline oxide semiconductor with a second composition that is different from the first composition of the first semiconductor layer, and the second semiconductor layer is layered on the first semiconductor layer.
    Type: Application
    Filed: June 27, 2018
    Publication date: January 3, 2019
    Inventors: Tokiyoshi MATSUDA, Takashi SHINOHE, Toshimi HITORA