Patents by Inventor Tokuhisa Ohiwa
Tokuhisa Ohiwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9177781Abstract: A plasma processing method in which performing a plasma etching on metal layers formed on a substrate is conducted to form a pattern having the metal layers in a stacked structure, and then a deposit containing a metal that forms the metal layers and being deposited on a sidewall portion of the pattern is removed, the method includes: forming a protective layer by forming an oxide or chloride of the metal on sidewall portions of the metal layers; removing the deposit by applying a plasma of a gas containing fluorine atoms; and reducing the oxide or chloride of the metal by applying a plasma containing hydrogen after forming the protective layer and removing the deposit.Type: GrantFiled: July 8, 2011Date of Patent: November 3, 2015Assignees: TOKYO ELECTRON LIMITED, KABUSHIKI KAISHA TOSHIBAInventors: Shigeru Tahara, Eiichi Nishimura, Fumiko Yamashita, Hiroshi Tomita, Tokuhisa Ohiwa, Hisashi Okuchi, Mitsuhiro Omura
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Publication number: 20150259788Abstract: According to one embodiment, a sputtering apparatus includes a first chamber configured to form a magnetic film on a substrate and a second chamber configured to form a non-magnetic film on the substrate, which are disposed to be adjacent to each other so that the substrate is conveyable between the chambers. A magnetic target is provided in the first chamber, and a non-magnetic target and a low dielectric-constant target having a dielectric constant lower than that of the non-magnetic target are provided in the second chamber. Here, before the non-magnetic target is formed on the substrate by sputtering, the low dielectric-constant target is subjected to sputtering in the second chamber, thereby depositing a low dielectric-constant material on the inner surface of the second chamber.Type: ApplicationFiled: September 5, 2014Publication date: September 17, 2015Inventors: Makoto NAGAMINE, Youngmin EEH, Koji UEDA, Daisuke WATANABE, Kazuya SAWADA, Toshihiko NAGASE, Tokuhisa OHIWA
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Patent number: 9126229Abstract: A deposit removal method for removing deposits deposited on the surface of a pattern formed on a substrate by etching, includes an oxygen plasma treatment process for exposing the substrate to oxygen plasma while heating the substrate and a cycle treatment process for, after the oxygen plasma treatment process, repeating multiple cycles of a first period and a second period. In the first period, the substrate is exposed to a mixture of hydrogen fluoride gas and alcohol gas inside a processing chamber and the partial pressure of the alcohol gas is set to the first partial pressure. In the second period, the partial pressure of the alcohol gas is set to the second partial pressure lower than the first partial pressure by exhausting the inside of the processing chamber.Type: GrantFiled: May 10, 2012Date of Patent: September 8, 2015Assignee: TOKYO ELECTRON LIMITEDInventors: Shigeru Tahara, Eiichi Nishimura, Hiroshi Tomita, Tokuhisa Ohiwa, Hisashi Okuchi, Mitsuhiro Omura
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Publication number: 20140284308Abstract: There are provided a plasma etching method and a plasma etching apparatus, capable of suppressing occurrence of local bias in etching rate and suppressing occurrence of charge-up damage. The plasma etching method of etching a silicon layer of a substrate to be processed using the plasma etching apparatus sets the pressure in a processing chamber to 13.3 Pa or more and applies, to a lower electrode, a first high-frequency power with a first frequency and a second high-frequency power with a second frequency that is lower than the first frequency and is a frequency of 1 MHz or lower.Type: ApplicationFiled: March 19, 2014Publication date: September 25, 2014Applicants: KABUSHIKI KAISHA TOSHIBA, TOKYO ELECTRON LIMITEDInventors: Shoichiro MATSUYAMA, Akitaka SHIMIZU, Susumu NOGAMI, Kiyohito ITO, Tokuhisa OHIWA, Katsunori YAHASHI
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Publication number: 20140083979Abstract: A deposit removal method for removing deposits deposited on the surface of a pattern formed on a substrate by etching, includes an oxygen plasma treatment process for exposing the substrate to oxygen plasma while heating the substrate and a cycle treatment process for, after the oxygen plasma treatment process, repeating multiple cycles of a first period and a second period. In the first period, the substrate is exposed to a mixture of hydrogen fluoride gas and alcohol gas inside a processing chamber and the partial pressure of the alcohol gas is set to the first partial pressure. In the second period, the partial pressure of the alcohol gas is set to the second partial pressure lower than the first partial pressure by exhausting the inside of the processing chamber.Type: ApplicationFiled: May 10, 2012Publication date: March 27, 2014Applicant: TOKYO ELECTRON LIMITEDInventors: Shigeru Tahara, Eiichi Nishimura, Hiroshi Tomita, Tokuhisa Ohiwa, Hisashi Okuchi, Mitsuhiro Omura
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Patent number: 8513134Abstract: In a semiconductor device producing method according to one embodiment, an insulating film containing silicon is formed on a semiconductor substrate, a resist is deposited on the insulating film, the resist is patterned into a predetermined pattern, and the insulating film is processed by a dry etching treatment in which gas containing C, F, Br, H, and O is used with the resist having the predetermined pattern as a mask. A deposited film in which C and Br are coupled is produced on the resist.Type: GrantFiled: January 25, 2011Date of Patent: August 20, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Mitsuhiro Omura, Yumi Ohno, Takaya Matsushita, Tokuhisa Ohiwa
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Patent number: 8487365Abstract: According to one embodiment, a semiconductor device includes a substrate, a lower gate layer, a stacked body, a dummy electrode layer, an insulating film, and a channel body. The lower gate layer is provided above the substrate. The stacked body includes a plurality of insulating layers and a plurality of electrode layers alternately stacked above the lower gate layer. The dummy electrode layer is provided between the lower gate layer and the stacked body, made of the same material as the electrode layer, and thicker than each of the electrode layers. The insulating film includes a charge storage film provided on a side wall of a hole formed to penetrate through the stacked body and the dummy electrode layer. The channel body is provided on an inside of the insulating film in the hole.Type: GrantFiled: March 7, 2011Date of Patent: July 16, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Toshiyuki Sasaki, Noriko Sakurai, Tokuhisa Ohiwa, Katsunori Yahashi
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Patent number: 8211783Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include multiply stacking an insulating layer and a conductive layer alternately above a base member. The insulating layer includes silicon oxide. The conductive layer includes silicon. In addition, the method can form a SiOC film on a stacked body of the insulating layers and the conductive layers, pattern the SiOC film, and make a hole in the stacked body by etching the insulating layers and the conductive layers using the patterned SiOC film as a mask.Type: GrantFiled: December 13, 2010Date of Patent: July 3, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Noriko Sakurai, Katsunori Yahashi, Tokuhisa Ohiwa
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Publication number: 20120021605Abstract: In a semiconductor device producing method according to one embodiment, an insulating film containing silicon is formed on a semiconductor substrate, a resist is deposited on the insulating film, the resist is patterned into a predetermined pattern, and the insulating film is processed by a dry etching treatment in which gas containing C, F, Br, H, and O is used with the resist having the predetermined pattern as a mask. A deposited film in which C and Br are coupled is produced on the resist.Type: ApplicationFiled: January 25, 2011Publication date: January 26, 2012Inventors: Mitsuhiro OMURA, Yumi Ohno, Takaya Matsushita, Tokuhisa Ohiwa
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Publication number: 20120009786Abstract: A plasma processing method in which performing a plasma etching on metal layers formed on a substrate is conducted to form a pattern having the metal layers in a stacked structure, and then a deposit containing a metal that forms the metal layers and being deposited on a sidewall portion of the pattern is removed, the method includes: forming a protective layer by forming an oxide or chloride of the metal on sidewall portions of the metal layers; removing the deposit by applying a plasma of a gas containing fluorine atoms; and reducing the oxide or chloride of the metal by applying a plasma containing hydrogen after forming the protective layer and removing the deposit.Type: ApplicationFiled: July 8, 2011Publication date: January 12, 2012Applicants: KABUSHIKI KAISHA TOSHIBA, TOKYO ELECTRON LIMITEDInventors: Shigeru TAHARA, Eiichi Nishimura, Fumiko Yamashita, Hiroshi Tomita, Tokuhisa Ohiwa, Hisashi Okuchi, Mitsuhiro Omura
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Publication number: 20110291178Abstract: According to one embodiment, a semiconductor device includes a substrate, a lower gate layer, a stacked body, a dummy electrode layer, an insulating film, and a channel body. The lower gate layer is provided above the substrate. The stacked body includes a plurality of insulating layers and a plurality of electrode layers alternately stacked above the lower gate layer. The dummy electrode layer is provided between the lower gate layer and the stacked body, made of the same material as the electrode layer, and thicker than each of the electrode layers. The insulating film includes a charge storage film provided on a side wall of a hole formed to penetrate through the stacked body and the dummy electrode layer. The channel body is provided on an inside of the insulating film in the hole.Type: ApplicationFiled: March 7, 2011Publication date: December 1, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Toshiyuki SASAKI, Noriko Sakurai, Tokuhisa Ohiwa, Katsunori Yahashi
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Publication number: 20110183497Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include multiply stacking an insulating layer and a conductive layer alternately above a base member. The insulating layer includes silicon oxide. The conductive layer includes silicon. In addition, the method can form a SiOC film on a stacked body of the insulating layers and the conductive layers, pattern the SiOC film, and make a hole in the stacked body by etching the insulating layers and the conductive layers using the patterned SiOC film as a mask.Type: ApplicationFiled: December 13, 2010Publication date: July 28, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Noriko SAKURAI, Katsunori YAHASHI, Tokuhisa OHIWA
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Publication number: 20110168205Abstract: A substrate cleaning method performing cleaning of a surface of a substrate after a pattern on the substrate is formed by plasma etching, includes: a by-product removal process removing a by-product by exposing the substrate to an HF gas atmosphere; and a residual fluorine removal process removing fluorine remaining on the substrate by turning cleaning gas containing hydrogen gas and chemical compound gas containing carbon and hydrogen as constituent elements into plasma to act on the substrate.Type: ApplicationFiled: January 6, 2011Publication date: July 14, 2011Applicants: TOKYO ELECTRON LIMITED, KABUSHIKI KAISHA TOSHIBAInventors: Shigeru TAHARA, Fumiko YAMASHITA, Eiichi NISHIMURA, Tokuhisa OHIWA, Takaya MATSUSHITA, Hiroshi TOMITA
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Patent number: 7767582Abstract: A method of manufacturing a semiconductor device, includes forming a sacrifice film on an etching target film, forming an etching mask on the sacrifice film, etching the etching target film using the etching mask as a mask, removing the sacrifice film to allow the etching mask to adhere to the etching target film, and removing the etching mask.Type: GrantFiled: September 22, 2006Date of Patent: August 3, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Nobuyasu Nishiyama, Kazuhiro Tomioka, Tokuhisa Ohiwa
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Patent number: 7767055Abstract: A capacitive coupling plasma processing apparatus includes a process chamber configured to have a vacuum atmosphere, and a process gas supply section configured to supply a process gas into the chamber. In the chamber, a first electrode and a second electrode are disposed opposite each other. An RF power supply is disposed to supply an RF power to the first or second electrode to form an RF electric field within a plasma generation region between the first and second electrodes, so as to turn the process gas into plasma. The target substrate is supported by a support member between the first and second electrodes such that a process target surface thereof faces the second electrode. A conductive functional surface is disposed in a surrounding region around the plasma generation region and grounded to be coupled with the plasma in a sense of DC to expand the plasma.Type: GrantFiled: December 2, 2005Date of Patent: August 3, 2010Assignees: Tokyo Electron Limited, Kabushiki Kaisha ToshibaInventors: Shinji Himori, Noriaki Imai, Katsumi Horiguchi, Takaaki Nezu, Shoichiro Matsuyama, Hiroki Matsumaru, Toshihiro Hayami, Kazuya Nagaseki, Itsuko Sakai, Tokuhisa Ohiwa, Yoshikazu Sugiyasu
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Patent number: 7628931Abstract: In order to facilitate control of a circulating gas, in a processing apparatus 100 having a showerhead 200 for supplying a processing gas into a processing chamber via a plurality of gas supply holes, a turbo pump 120 for evacuating the processing gas from the processing chamber 110 and a circulating gas piping 150 for returning at least a portion (circulating gas Q2) of the exhaust gas evacuated from the processing chamber by the turbo pump to the showerhead, the showerhead is provided with a primary gas supply system that supplies a primary gas Q1 supplied from a gas source 140 into the processing chamber via a plurality of primary gas outlet holes h1 and a circulating gas supply system that supplies the circulating gas into the processing chamber via a plurality of circulating gas supply holes h2, with the primary gas supply system and the circulating gas supply system constituted as systems independent of each other.Type: GrantFiled: August 5, 2005Date of Patent: December 8, 2009Assignees: Tokyo Electron Limited, Kabushiki Kaisha ToshibaInventors: Masashi Saito, Yusuke Hirayama, Itsuko Sakai, Tokuhisa Ohiwa
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Patent number: 7595885Abstract: A process monitoring system has a process chamber configured to hold an object to be processed, an illumination source configured to emit a light to the object, a polarizer configured to polarize the light, a monitor window having a birefringent material and provided on the process chamber to propagate the light, direction adjusting equipment configured to adjust a relationship between a polarization plane of the light and a direction of an optic axis of the monitor window, and a monitoring information processor configured to detect the light reflected from the object.Type: GrantFiled: January 31, 2008Date of Patent: September 29, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Takayuki Sakai, Masanobu Kibe, Tokuhisa Ohiwa
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Publication number: 20080137083Abstract: A process monitoring system has a process chamber configured to hold an object to be processed, an illumination source configured to emit a light to the object, a polarizer configured to polarize the light, a monitor window having a birefringent material and provided on the process chamber to propagate the light, direction adjusting equipment configured to adjust a relationship between a polarization plane of the light and a direction of an optic axis of the monitor window, and a monitoring information processor configured to detect the light reflected from the object.Type: ApplicationFiled: January 31, 2008Publication date: June 12, 2008Applicant: Kabushiki Kaisha ToshibaInventors: Takayuki Sakai, Masanobu Kibe, Tokuhisa Ohiwa
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Patent number: 7349088Abstract: A process monitoring system has a process chamber configured to hold an object to be processed, an illumination source configured to emit a light to the object, a polarizer configured to polarize the light, a monitor window having a birefringent material and provided on the process chamber to propagate the light, direction adjusting equipment configured to adjust a relationship between a polarization plane of the light and a direction of an optic axis of the monitor window, and a monitoring information processor configured to detect the light reflected from the object.Type: GrantFiled: July 31, 2007Date of Patent: March 25, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Takayuki Sakai, Masanobu Kibe, Tokuhisa Ohiwa
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Patent number: 7327455Abstract: A process monitoring system has a process chamber configured to hold an object to be processed, an illumination source configured to emit a light to the object, a polarizer configured to polarize the light, a monitor window having a birefringent material and provided on the process chamber to propagate the light, direction adjusting equipment configured to adjust a relationship between a polarization plane of the light and a direction of an optic axis of the monitor window, and a monitoring information processor configured to detect the light reflected from the object.Type: GrantFiled: October 22, 2004Date of Patent: February 5, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Takayuki Sakai, Masanobu Kibe, Tokuhisa Ohiwa