Patents by Inventor Tokumitsu Sakamoto

Tokumitsu Sakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6020603
    Abstract: A high voltage semiconductor device such as a gate turn-off thyristor, reduces surface field concentration of a main P-N junction part and attains withstand voltage increase.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: February 1, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Futoshi Tokunoh, Yasuo Tanaka, Tokumitsu Sakamoto, Nobuhisa Nakasima
  • Patent number: 5633536
    Abstract: Provided is a press contact type semiconductor device which improves the shape of an insulator formed along an outer peripheral edge and a major surface of a semiconductor substrate, simplifies alignment of an anode heat compensator and a cathode heat compensator, causes no biting, causes no separation in molding, and has excellent heat dissipation. In the press contact type semiconductor device, the inner periphery of a ring-shaped insulator (22) which is formed along an edge of the overall periphery and a major surface of a semiconductor substrate (6) provided with a P-N junction in its interior comprises a tapered portion (22a) along the inner peripheral direction and a vertical portion (22b) forming a perpendicular inner peripheral diameter which is continuous to this tapered portion (22a).
    Type: Grant
    Filed: December 5, 1995
    Date of Patent: May 27, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuhisa Nakashima, Yuzuru Konishi, Tokumitsu Sakamoto
  • Patent number: 5519231
    Abstract: In order to obtain a pressure-connection type semiconductor device while preventing misregistration of a semiconductor base substrate and a thermal compensator with no penetration of an insulating/holding material and a method suitable for fabricating this device, concentric first and second steps (31c, 31a) are provided on an upper major surface of a first thermal compensator (31) from its outer periphery toward the center. A corner groove (3b) is provided along the overall periphery of an inner comer of the first step (31c), in the form of a ring. Since no insulating/holding material is provided in a contact surface between the semiconductor the substrate and the thermal compensator, the semiconductor base substrate and the thermal compensator are maintained in excellent electrical contact while no local stress is applied to the semiconductor substrate when the same is brought into pressure contact with the thermal compensator.
    Type: Grant
    Filed: November 15, 1994
    Date of Patent: May 21, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuhisa Nakashima, Tokumitsu Sakamoto, Yuzuru Konishi
  • Patent number: 5489802
    Abstract: A semiconductor substrate (2) is pressed against heat compensators (6, 31) for electrical contact therewith without brazing. Silicone rubber (32) fixes the outer peripheral edge of the semiconductor substrate (2) and its adjacent portion on the heat compensator (31), preventing position shifts of the semiconductor substrate (2) without thermal distortion and, accordingly, preventing damages to the semiconductor substrate (2). The absence of thermal distortion, spikes, voids due to brazing permits the prevention of electrical characteristic deterioration.
    Type: Grant
    Filed: June 18, 1993
    Date of Patent: February 6, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tokumitsu Sakamoto, Yuzuru Konishi
  • Patent number: 5100809
    Abstract: A silicon substrate (20) having a pnpn structure is soldered to a metal plate (10). A silicon oxide film (16) is naturally formed on the side surface of the silicon substrate during a process of removing defective part of the side surface, and a metal component penetrates into the silicon oxide film. The silicon substrate is dipped into an etchant to etch the silicon oxide film, so that a leak current through the metal component is effectively prevented.
    Type: Grant
    Filed: February 5, 1991
    Date of Patent: March 31, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuhisa Nakashima, Tokumitsu Sakamoto