Abstract: The disclosed invention reduces the power consumption of a liquid-crystal device. A shift register section includes DX selection circuits and shift registers, which are divided into blocks. An X clock signal is supplied to a block in which the image data values do not match between horizontal lines which are adjacent in a data time-series manner, and is not supplied to a block in which the image data values match. In addition, for the block in which the image data values match, the image data, which forms time-division data becomes non-active, and the previous data value is maintained. For this reason, it is possible to reduce electric power for driving an X clock signal supply line and an image data supply line.

Abstract: A data line driving circuit drives data lines of an electro-optical panel, which occupies a small area and can drive the data lines with low power consumption. When the digit of the most significant bit is “0”, all of the &ggr;-correction switches are in an on-state. Thus, the &ggr;-correction is not performed. Conversely, when the digit of the most significant bit is “0”, the &ggr;-correction switches are put into an on-state according to the data value represented by low order bits. Thus, the &ggr;-correction is performed. That is, whether or not the &ggr;-correction is performed can be determined according to which of the white side and the black side the gray scale level to be displayed is on. Furthermore, irrespective of whether or not the &ggr;-correction is performed, DAC capacitances are used for both the cases that the &ggr;-correction is performed, and that &ggr;-correction is not performed. Thus, the size of the circuit can be reduced.

Abstract: The invention provides a first gate-line breakage inspection process in which a signal for switching on each thin-film transistor is supplied to each gate of a first left-side transistor sequence, and a current value of a current flowing through two gate lines conducted by each thin-film transistor is measured. In a second gate-line breakage inspection process, a signal for switching on each thin-film transistor is supplied to each gate of a second left-side transistor sequence, and a current value of a current flowing through two gate lines conducted by each thin-film transistor is measured. Subsequently, it is determined whether any gate line is defective based on the inspection results of the first gate-line breakage inspection process and the second gate-line breakage inspection process.

Abstract: To simplify the configuration of a level shifter and to allow fast operation.

Abstract: The present invention provides a systems and methods to perform an electrical test on a substrate assembly used as a TFT array substrate of a liquid-crystal device without detaching a mounted external IC. The substrate assembly can include a substrate, a peripheral circuit embedded in the substrate, a first wiring arranged on the substrate, and an external IC, mounted on the substrate, and having a first terminal connected to an interconnection portion arranged on the first wiring. The substrate assembly can further include a second wiring which extends from the interconnection portion in such a manner that the second wiring is routed in a portion of the substrate facing the integrated circuit, and a first external circuit connection terminal arranged on the second wiring in a portion of the substrate not facing the integrated circuit. The external IC is thus tested through the external circuit connection terminal.

Abstract: First, when a switch portion is in an off-state, the first charging portion C1 charges parasitic capacitance CS. Second, a second charging portion C2 charges internal capacitance CD during the switch portion SW remains in the off-state. Third, the switch portion SW is turned on. Then, electric charges flow into the parasitic capacitance CS from the internal capacitance CD. Finally, the value of the voltage of the internal capacitance CD becomes equal to that of the voltage of the parasitic capacitance CS. Fourth, the switch portion SW is turned off. Then, the second charging portion C2 charges the internal capacitance CD again. Thence, the third step and the fourth step are repeated. Consequently, the voltage of the parasitic capacitance CS can be set at a desired value.

Abstract: The present invention provides a liquid crystal display in which a voltage amplitude of a data signal which is supplied to a data line, is kept small, thereby reducing the power consumption. When a scanning signal supplied to a scanning line is set to an H level, a data signal with the voltage depending on the gray level and depending on the writing polarity is applied to a data line. In this case, a thin-film transistor (TFT) is turned on, thus a liquid crystal capacitor and storage capacitor store the charge corresponding to the data signal. Then, the scanning signal is set to an L level to turn TFT off, and the voltage of the other terminal of the storage capacitor is raised from the low side of capacitor voltage Vst(−) to the high side Vst(+), and the charge corresponding to the raised voltage amount is redistributed to the liquid crystal capacitor.

Abstract: The voltage swing of a data signal, which is supplied to a data line, is maintained to be small, thereby reducing the power consumption. When a scanning signal supplied to a scanning line is set to an on-voltage, a data signal with a voltage, depending on the density and depending on the writing polarity, is applied to a data line. In this case, a TFT is turned on. Thus, a liquid crystal capacitor and storage capacitor store the charge corresponding to the voltage of the data signal. Then, the scanning signal is set to an off-voltage to turn the TFT off, and the voltage of the other terminal of the storage capacitor is raised from the low-level of capacitor voltage to the high-level, and the charge corresponding to the raised voltage amount is redistributed to the liquid crystal capacitor. Thus, the effective voltage value applied to the liquid crystal capacitor can correspond to the voltage swing of the data signal or more.

Abstract: The invention produces a high-quality display, in which the occurrence of display variations is reduced, with low power consumption. One field is divided into subfields corresponding to the bits of gray scale data, and the period of each subfield is set in such a manner as to correspond to the weight of each bit. A pixel includes memories that store bits of the gray scale data, a selector that selects a memory that stores the bit corresponding to the subfield from among these memories, a closed loop of inverters, and a TFT that reads and latches the bits stored in the selected memory and that rewrites into the selected memory, and complementary switches that select, with respect to a pixel electrode, a voltage corresponding to an ON display signal or an OFF display signal in accordance with the bit read from the selected memory.

Abstract: A drive circuit for an electro-optical device, which has a plurality of pairs of shift registers for latching and holding signals representing bits of image data, a D/A converter for performing D/A-conversion on image data latched by the shift register n-bits by n-bits, for generating voltages corresponding to 2N gray scales and for supplying the generated voltages to signal lines, and a switch group for selectively supplying image data latched by one of the shift registers of each of the pairs to the D/A converter. This drive circuit is adapted to repeatedly perform an operation of supplying the D/A converter with image data held by one of the shift registers of each of the pairs during image data is latched by the other shift register. Thus, image data can be inputted thereto at a high speed.

Abstract: An electro-optical driving device for providing a high-quality display that is free from non-uniformities. Subpixels 120a, 120b, and 120c are arranged at the respective intersections of 3m scanning lines 112 that extend in the X direction and n data lines 114 that extend in the Y direction. The subpixels 120a, 120b, and 120c are adjacent in the Y direction and are grouped together as a pixel 120 in a driving operation. In a first mode, the subpixels forming the one pixel are individually turned on and off in response to gray scale data indicating the gray scale of the pixel. In a second mode, the subpixels forming the one pixel are supplied with a common voltage in response to the gray scale data indicating the gray scale of the pixel. In this way, the signal supplied to the data lines is binary regardless of the first mode or the second mode.

Abstract: A data line driving circuit drives data lines of an electro-optical panel, which occupies a small area and can drive the data lines with low power consumption. When the digit of the most significant bit is “0”, all of the &ggr;-correction switches are in an on-state. Thus, the &ggr;-correction is not performed. Conversely, when the digit of the most significant bit is “0”, the &ggr;-correction switches are put into an on-state according to the data value represented by low order bits. Thus, the &ggr;-correction is performed. That is, whether or not the &ggr;-correction is performed can be determined according to which of the white side and the black side the gray scale level to be displayed is on. Furthermore, irrespective of whether or not the &ggr;-correction is performed, DAC capacitances are used for both the cases that the &ggr;-correction is performed, and that &ggr;-correction is not performed. Thus, the size of the circuit can be reduced.

Abstract: The invention obtains high-quality display by suppressing display unevenness. Sub-pixels are disposed correspondingly to each set of the intersections between 3 m pairs of paired scanning lines, which are formed in such a manner as to extend in the X-direction, and n pairs of paired data lines, which are a digital data line and an analog data line and extend in the Y-direction. Further, a set of sub-pixels consecutively arranged in the Y-direction is driven as one pixel. In this case, in a first mode, each of the sub-pixels of one pixel turns on or off according to gradation data representing the gradation level of this pixel. Further, in a second mode, a voltage signal representing the gradation level of this pixel is applied to the sub-pixels of one pixel. Furthermore, in a first case of the second mode, the voltage signals are supplied by the first data line driving circuit in line sequence.

Abstract: To maintain image quality when a field frequency is dynamically changed. In an image display area AA, control lines 4a are arranged respectively corresponding to scanning lines 3a, and TFTs 50 and 51, a pixel electrode 9a, and a storage capacitor 52 are arranged at each intersection of one of data lines 6a and scanning lines 3a. A control signal SC supplied through the control line 4a controls the TFT 51 for an on and off operation. A timing signal generator circuit 300 activates the control signal SC when a field frequency is not higher than 60 Hz, and deactivates the control signal SC when a field frequency is above 60 Hz. In this way, whether or not to connect the storage capacitor 52 to the pixel electrode 9a is determined.

Abstract: The disclosed invention reduces the power consumption of a liquid-crystal device. A shift register section includes DX selection circuits and shift registers, which are divided into blocks. An X clock signal is supplied to a block in which the image data values do not match between horizontal lines which are adjacent in a data time-series manner, and is not supplied to a block in which the image data values match. In addition, for the block in which the image data values match, the image data, which forms time-division data becomes non-active, and the previous data value is maintained. For this reason, it is possible to reduce electric power for driving an X clock signal supply line and an image data supply line.

Abstract: Lamp wave signals are supplied to signal supply lines via switches. The switches are turned ON when their corresponding scanning lines are selected. Hence, a load on the driving circuit for the lamp wave signals will be a parasitic capacitance that comes from a single signal supply line. PWM signals of having pulse widths based on image data are supplied to data lines. A TFT supplies PWM signals to a gate electrode of a TFT when a corresponding scanning line is selected; therefore, the lamp wave signal is applied to a pixel electrode via the TFT when the data line and the scanning line simultaneously become active.

Abstract: The invention prevents shift register circuits from malfunctioning. A distribution circuit outputs a trailing trigger pulse DTP and a leading trigger pulse UTP. A trailing edge control circuit and a leading edge control circuit delay the trailing trigger pulse DTP and the leading trigger pulse UTP, respectively. The delay time of each of these control circuits can be set. These delay times are determined according to a threshold voltage of a TFT constituting a shift register. An inverted clock signal CLYINV is generated according to output signals of the control circuits. The shift register is driven by a clock signal CLY and an inverted clock signal CLYINV.