Abstract: In examples, an electronic device includes an antenna and a transmitter line. The transmitter line includes a double-tuned transformer having first and second windings, the first winding having first and second ends, the second winding having third and fourth ends, and the third end coupled to the antenna. The transmitter line includes a first capacitor coupled between the first and second ends. The transmitter line also includes a second capacitor coupled between the third and fourth ends, and a switch coupled between the first end and a reference terminal.

Abstract: Electrical balance duplexers (EBDs). An example EBD includes a differential TX port coupled to a first coil, a differential RX port coupled to a second coil, a differential ANT port coupled to a third coil, and a differential BAL port coupled to a fourth coil. In some cases, the first and second coils are arranged such that magnetic flux cancellation is achieved between the two, thus isolating the TX port from the RX port. In some cases, DC isolation exists between the coils. During operation, the first coil may electromagnetically couple with the third coil and the fourth coil, and the second coil may electromagnetically couple with the third coil and the fourth coil. In some example cases, the first and second coils are each in their own metallization layer, and the third and fourth coils are in the same layer.

Abstract: A bidirectional phase shifter includes a differential quadrature hybrid coupler, a switch network, and a differential reflection type phase shifter (RTPS). The differential quadrature hybrid coupler includes a first phase input/output (I/O) port, an inverse first phase I/O port, a second phase I/O port, and an inverse second phase I/O port. The switch network is coupled to the first phase I/O port, the inverse first phase I/O port, the second phase I/O port, and the inverse second phase I/O port. The differential RTPS including a differential I/O port coupled to the switch network.

Abstract: An apparatus includes a first primary coil, a second primary coil, and a secondary coil. The first and second primary coils each include a first, second, and third portion. The secondary coil includes a first and second portion in a first wafer layer, which are coupled together by a bridge in a second wafer layer. The second portion of the first primary coil is nested inside the first portion of the secondary coil in the first wafer layer. The second portion of the second primary coil is nested inside the second portion of the secondary coil in the first wafer layer. At least parts of the first and third portions of the first primary coil are adjacent the second portion of the secondary coil, and at least parts of the first and third portions of the second primary coil are adjacent the first portion of the secondary coil.

Abstract: A system includes a first differential amplifier and a first transformer with a primary coil coupled to an output of the first differential amplifier and with a secondary coil coupled to a load. The system also includes a second differential amplifier and a second transformer with a primary coil coupled to an output of the second differential amplifier and with a secondary coil coupled in series with the secondary coil of the first transformer. The system also includes a tuning network coupled to a center tap node between the secondary coil of the first transformer and the secondary coil of the second transformer.

Abstract: A frequency multiplier includes an input section having inputs to receive an input signal having an input frequency, a mixer section, and an output section magnetically coupled to the input section and generating an output signal in response to the input signal. The mixer section may be coupled to the input section by a common mode node forming a path for a common mode current to flow to the mixer section and be magnetically coupled to the common mode node. The input section may generate a signal current, and the mixer section may be magnetically coupled to the input section and be directly capacitively coupled to the input section through a capacitor in a signal current path. The mixer section may have differential inputs capacitively coupled to the input section and also be coupled to the input section through a current path. A current helper section may be coupled to the current path.

Abstract: An on-chip directional coupler includes a first linear conductive trace, a second linear conductive trace, and a conductive loop. The first linear conductive trace including an end and a coupled port. The second linear conductive trace is spaced apart from and parallel to the first linear conductive trace. The second linear conductive trace includes an end and an isolated port. The conductive loop includes a first end conductively coupled to the end of the first linear conductive trace, and a second end conductively coupled to the end of the second linear conductive trace.

Abstract: A frequency multiplier includes an input section having inputs to receive an input signal having an input frequency, a mixer section, and an output section magnetically coupled to the input section and generating an output signal in response to the input signal. The mixer section may be coupled to the input section by a common mode node forming a path for a common mode current to flow to the mixer section and be magnetically coupled to the common mode node. The input section may generate a signal current, and the mixer section may be magnetically coupled to the input section and be directly capacitively coupled to the input section through a capacitor in a signal current path. The mixer section may have differential inputs capacitively coupled to the input section and also be coupled to the input section through a current path. A current helper section may be coupled to the current path.

Abstract: In described examples, a method of operating a transceiver with a transmitter and a receiver includes generating a frequency reference. In the transmitter: A phase locked loop (PLL) generates a first voltage controlled oscillator (VCO) control voltage responsive to the frequency reference. A VCO in the transmitter generates a transmitter VCO signal responsive to the first VCO control voltage, and the PLL is locked to the transmitter VCO signal. In the receiver: A signal is received. A receiver VCO generates a receiver VCO signal responsive to the first or a second VCO control voltage. The receiver VCO signal is multiplied by the received signal to generate an I component, and by the received signal phase shifted by 90° to generate a Q component. The second VCO control signal is generated responsive to the I component and the Q component.

Abstract: An example apparatus includes a first transformer winding having a first proximal end and a first distal end and a second transformer winding having a second proximal end and a second distal end, the first proximal end having a first distance from the second proximal end and the first distal end having a second distance from the second distal end, the first distance less than the second distance.

Abstract: An oscillator includes: a bulk-acoustic wave (BAW) resonator having a first BAW resonator terminal and a second BAW resonator terminal; and an active circuit coupled to the first and second BAW resonator terminals and having a series resonance topology with: a first transistor; a second transistor; a first resistor; a second resistor; a capacitive network coupled to first and second BAW resonator terminals and to respective current terminals of the first and second transistors; and an inductor having a first inductor terminal and a second inductor terminal, the first inductor terminal coupled to the capacitive network, and the second inductor terminal coupled to ground terminal.

Abstract: A system includes a first differential amplifier and a first transformer with a primary coil coupled to an output of the first differential amplifier and with a secondary coil coupled to a load. The system also includes a second differential amplifier and a second transformer with a primary coil coupled to an output of the second differential amplifier and with a secondary coil coupled in series with the secondary coil of the first transformer. The system also includes a tuning network coupled to a center tap node between the secondary coil of the first transformer and the secondary coil of the second transformer.

Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to provide phase imbalance correction. An example system includes a phase detector to obtain a first signal and generate a first output, a comparator coupled to the phase detector, the comparator to generate a second output based on the first output, and an amplifier coupled to the comparator, the amplifier to adjust a first phase response of the first signal based on the second output.

Abstract: In described examples, a method of operating a transceiver with a transmitter and a receiver includes generating a frequency reference. In the transmitter: A phase locked loop (PLL) generates a first voltage controlled oscillator (VCO) control voltage responsive to the frequency reference. A VCO in the transmitter generates a transmitter VCO signal responsive to the first VCO control voltage, and the PLL is locked to the transmitter VCO signal. In the receiver: A signal is received. A receiver VCO generates a receiver VCO signal responsive to the first or a second VCO control voltage. The receiver VCO signal is multiplied by the received signal to generate an I component, and by the received signal phase shifted by 90° to generate a Q component. The second VCO control signal is generated responsive to the I component and the Q component.

Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.

Abstract: A circuit comprising a differential transmission line and eight switches provides non-reciprocal signal flow. In some embodiments, the circuit can be driven by four local oscillator signals. The circuit can be used to form a gyrator. The circuit can be used to form a circulator. The circuit can be used to form three-port circulator than can provide direction signal flow between a transmitter and an antenna and from the antenna to a receiver. The three-port circulator can be used to implement a full duplex transceiver that uses a single antenna for transmitting and receiving.

Abstract: In described examples, a method of operating a transmitter includes generating a frequency reference signal having a reference frequency and outputting the frequency reference to a phase locked loop (PLL) that includes a voltage controlled oscillator (VCO). The VCO output is locked to the frequency reference signal to form a carrier signal. The transmitter receives an I input signal, a Q input signal, and a direct current (DC) leaky carrier signal. Either the I input signal or the Q input signal is added to the leaky carrier signal. The carrier signal is modulated with the resulting two signals using an I-Q mixer to generate a modulated signal that includes an unmodulated carrier signal component. The modulated signal is then transmitted.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to provide phase imbalance correction. An example system includes a phase detector to obtain a first signal and generate a first output, a comparator coupled to the phase detector, the comparator to generate a second output based on the first output, and an amplifier coupled to the comparator, the amplifier to adjust a first phase response of the first signal based on the second output.

Abstract: Techniques that facilitate reconfigurable transmission of a radar frequency signal are provided. In one example, a system includes a signal generator and a power modulator. The signal generator provides a radar waveform signal from a set of radar waveform signals. The power modulator divides a local oscillator signal associated with a first frequency and a first amplitude into a first local oscillator signal and a second local oscillator signal. The power modulator also generates a radio frequency signal associated with a second frequency and a second amplitude based on the radar waveform signal, the first local oscillator signal and the second local oscillator signal.