Patents by Inventor Tom Choi

Tom Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9818621
    Abstract: Embodiments described herein relate to methods for etching a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment to implant ions into a spacer material, performing an etching process on an implanted region of the spacer material, and repeating the inert plasma treatment and the etching process to form a predominantly flat top spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as pressure, may be controlled to influence a desired spacer profile.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: November 14, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Aurelien Tavernier, Qingjun Zhou, Tom Choi, Yungchen Lin, Ying Zhang, Olivier Joubert
  • Publication number: 20170243754
    Abstract: Embodiments described herein relate to methods for etching a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment to implant ions into a spacer material, performing an etching process on an implanted region of the spacer material, and repeating the inert plasma treatment and the etching process to form a predominantly flat top spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as pressure, may be controlled to influence a desired spacer profile.
    Type: Application
    Filed: January 4, 2017
    Publication date: August 24, 2017
    Inventors: Aurelien TAVERNIER, Qingjun ZHOU, Tom CHOI, Yungchen LIN, Ying ZHANG, Olivier JOUBERT
  • Patent number: 9721807
    Abstract: Embodiments described herein relate to methods for patterning a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment on a spacer material, performing an etching process on a treated region of the spacer material, and repeating the inert plasma treatment and the etching process to form a desired spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as process gas ratios and pressures, may be controlled to influence a desired spacer profile.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: August 1, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Qingjun Zhou, Jungmin Ko, Tom Choi, Sean Kang, Jeremiah Pender, Srinivas D. Nemani, Ying Zhang
  • Publication number: 20170061370
    Abstract: An electronic interactive airline-shipped-cargo handling and management system and method therefor comprising a least one IATA airline-cargo-information data extraction engine, at least one data base, at least one user portal for access by at least one stakeholder to manage, track, or reconcile an airline-cargo shipment, at least one mobile warehouse portal, at least one airline-shipped-cargo handling server having at least one messaging engine, at least one mobile warehouse management system and a network connecting all of the foregoing for the access and management of airline-cargo-information data extracted from at least one airline's IATA messages by said IATA airline-cargo-information data extraction engine, and the transmission of said extracted airline-cargo-information data to and from said at least one user portal and said at least one mobile warehouse portal respectively, in real time, while the shipped airline-cargo is being processed through a cargo handling logistics' chain.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Inventors: TOM CHOI, LI ZHAO, VIDA LEE SHAVER, MICHAEL SERZO, ALBERT KIM, CECILIA LIM, SAN M. CHU, DONG HYUN KIM, SUNG SUB MOON
  • Patent number: 9478433
    Abstract: Embodiments described herein relate to methods for patterning a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment on a spacer material, performing an etching process on a treated region of the spacer material, and repeating the inert plasma treatment and the etching process to form a desired spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as process gas ratios and pressures, may be controlled to influence a desired spacer profile.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: October 25, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Qingjun Zhou, Jungmin Ko, Tom Choi, Sean Kang, Jeremiah Pender, Srinivas D. Nemani, Ying Zhang
  • Publication number: 20160307772
    Abstract: Embodiments described herein relate to methods for etching a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment to implant ions into a spacer material, performing an etching process on an implanted region of the spacer material, and repeating the inert plasma treatment and the etching process to form a predominantly flat top spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as pressure, may be controlled to influence a desired spacer profile.
    Type: Application
    Filed: December 14, 2015
    Publication date: October 20, 2016
    Inventors: Tom CHOI, Qingjun ZHOU, Ying ZHANG
  • Publication number: 20160293438
    Abstract: Embodiments described herein relate to methods for patterning a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment on a spacer material, performing an etching process on a treated region of the spacer material, and repeating the inert plasma treatment and the etching process to form a desired spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as process gas ratios and pressures, may be controlled to influence a desired spacer profile.
    Type: Application
    Filed: March 24, 2016
    Publication date: October 6, 2016
    Inventors: Qingjun ZHOU, Jungmin KO, Tom CHOI, Sean KANG, Jeremiah PENDER, Srinivas D. NEMANI, Ying ZHANG
  • Publication number: 20160293437
    Abstract: Embodiments described herein relate to methods for patterning a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment on a spacer material, performing an etching process on a treated region of the spacer material, and repeating the inert plasma treatment and the etching process to form a desired spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as process gas ratios and pressures, may be controlled to influence a desired spacer profile.
    Type: Application
    Filed: December 14, 2015
    Publication date: October 6, 2016
    Inventors: Qingjun ZHOU, Jungmin KO, Tom CHOI, Sean KANG, Jeremiah PENDER, Srinivas D. NEMANI, Ying ZHANG
  • Publication number: 20150347960
    Abstract: The present invention related to a system and computer-implemented method directed to cargo handling services. A stakeholder captures airline data and customer related cargo data and transmits the data to at least one other stakeholder through either a customer service portal or a mobile warehouse management system. The system is a cargo management system comprising three parts. First, a messaging engine adapted to transmit airline data. Second, a customer service portal receives data from the messaging engine for a stakeholder, such that the stakeholder may manage, track, or reconcile a cargo shipment. Finally, a mobile warehouse management system implemented for recording data and tracking cargo in real-time.
    Type: Application
    Filed: December 16, 2014
    Publication date: December 3, 2015
    Inventors: Tom Choi, Li Zhao, Vida Lee Shaver, Michael Serzo, Albert Kim, Cecilia Lim, San M. Chu, Dong Hyun Kim, Sung Sub Moon
  • Patent number: 8912633
    Abstract: A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: December 16, 2014
    Assignee: Lam Research Corporation
    Inventors: Sangjun Cho, Tom Choi, Taejoon Han, Sean Kang, Prabhakara Gopaladasu, Bi-Ming Yen
  • Patent number: 8906810
    Abstract: An all-in-one trench-over-via etch wherein etching of a low-k material beneath a metal hard mask of titanium nitride containing material is carried out in alternating steps of (a) etching the low-k material while maintaining chuck temperature at about 45 to 80° C. and (b) metal hard mask rounding and Ti-based residues removal while maintaining chuck temperature at about 90 to 130° C.
    Type: Grant
    Filed: May 7, 2013
    Date of Patent: December 9, 2014
    Assignee: Lam Research Corporation
    Inventors: Ananth Indrakanti, Bhaskar Nagabhirava, Alan Jensen, Tom Choi
  • Publication number: 20140335697
    Abstract: An all-in-one trench-over-via etch wherein etching of a low-k material beneath a metal hard mask of titanium nitride containing material is carried out in alternating steps of (a) etching the low-k material while maintaining chuck temperature at about 45 to 80° C. and (b) metal hard mask rounding and Ti-based residues removal while maintaining chuck temperature at about 90 to 130° C.
    Type: Application
    Filed: May 7, 2013
    Publication date: November 13, 2014
    Applicant: Lam Research Corporation
    Inventors: Ananth Indrakanti, Bhaskar Nagabhirava, Alan Jensen, Tom Choi
  • Publication number: 20130001754
    Abstract: A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.
    Type: Application
    Filed: September 7, 2012
    Publication date: January 3, 2013
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Sangjun Cho, Tom Choi, Taejoon Han, Sean Kang, Prabhakara Gopaladasu, Bi-Ming Yen
  • Patent number: 8283255
    Abstract: A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: October 9, 2012
    Assignee: Lam Research Corporation
    Inventors: Sangjun Cho, Tom Choi, Taejoon Han, Sean Kang, Prabhakara Gopaladasu, Bi-Ming Yen
  • Patent number: 8124516
    Abstract: A method of forming dual damascene features in a porous low-k dielectric layer is provided. Vias are formed in the porous low-k dielectric layer. An organic planarization layer is formed over the porous low-k dielectric layer, wherein the organic layer fills the vias. A photoresist mask is formed over the organic planarization layer. Features are etched into the organic planarization layer comprising providing a CO2 containing etch gas and forming a plasma from the CO2 containing etch gas, which etches the organic planarization layer. Trenches are etched into the porous low-k dielectric layer using the organic planarization layer as a mask. The organic planarization layer is stripped.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: February 28, 2012
    Assignee: Lam Research Corporation
    Inventors: Sean S. Kang, Sang Jun Cho, Tom Choi, Taejoon Han
  • Patent number: 7782591
    Abstract: Particles are trapped away from a wafer transport zone in a chamber. A first electrode is on one side of the zone. A second electrode is on an opposite side of the zone. A power supply connected across the electrodes establishes an electrostatic field between the electrodes. The field traps particles at the electrodes, away from the zone. For transporting the wafer from the chamber, the second electrode mounts the wafer for processing, and the first electrode is opposite to the second electrode defining a process space. The zone is in the space with a separate part of the space separating the zone from each electrode. Particles are urged away from the wafer by simultaneously terminating plasma processing of the wafer, connecting the second electrode to ground, applying a positive DC potential to the first electrode, and de-chucking the wafer from the second electrode into the zone.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: August 24, 2010
    Assignee: Lam Research Corporation
    Inventors: Sangjun Cho, Sean Kang, Tom Choi, Taejoon Han
  • Patent number: 7479457
    Abstract: Atomic oxygen generated in oxygen stripping plasmas reacts with and damages low-k dielectric materials during stripping of dielectric post etch residues. While damage of low-k dielectric materials during stripping of dielectric post etch residues is lower with hydrogen stripping plasmas, hydrogen stripping plasmas exhibit lower strip rates. Inclusion of oxygen in a hydrogen stripping plasma improves both photoresist strip rate and uniformity, while maintaining a hydrogen to oxygen ratio avoids low-k dielectric material damage.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: January 20, 2009
    Assignee: Lam Research Corporation
    Inventors: Cristian Paduraru, Alan Jensen, David Schaefer, Robert Charatan, Tom Choi
  • Publication number: 20080314733
    Abstract: Particles are trapped away from a wafer transport zone in a chamber. A first electrode is on one side of the zone. A second electrode is on an opposite side of the zone. A power supply connected across the electrodes establishes an electrostatic field between the electrodes. The field traps particles at the electrodes, away from the zone. For transporting the wafer from the chamber, the second electrode mounts the wafer for processing, and the first electrode is opposite to the second electrode defining a process space. The zone is in the space with a separate part of the space separating the zone from each electrode. Particles are urged away from the wafer by simultaneously terminating plasma processing of the wafer, connecting the second electrode to ground, applying a positive DC potential to the first electrode, and de-chucking the wafer from the second electrode into the zone.
    Type: Application
    Filed: June 22, 2007
    Publication date: December 25, 2008
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Sangjun Cho, Sean Kang, Tom Choi, Taejoon Han
  • Publication number: 20080293249
    Abstract: A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.
    Type: Application
    Filed: May 24, 2007
    Publication date: November 27, 2008
    Inventors: Sangjun Cho, Tom Choi, Taejoon Han, Sean Kang, Prabhakara Gopaladasu, Bi-Ming Yen
  • Publication number: 20080064214
    Abstract: In the fabrication of an integrated circuit where a porous silicon oxide layer is formed over a surface of a semiconductor substrate to electrically isolate two conductive metal layers, a via through the porous silicon oxide layer has an opening etched through the porous silicon oxide layer, a self-assembled monolayer adhering to an etched surface of the opening and to exposed pores, and a conductive material filling the opening.
    Type: Application
    Filed: September 13, 2006
    Publication date: March 13, 2008
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Taejoon Han, Sang-Jun Cho, Sung-Jin Cho, Tom Choi, Prabhakara Gopaladasu, Sean Kang