Patents by Inventor Tom Har'el Kolan

Tom Har'el Kolan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190377614
    Abstract: A computer-implemented method, computerized apparatus and computer program product for verification of atomic memory operations are disclosed. The method comprising: independently generating for each of a plurality of threads at least one instruction for performing an atomic memory operation of a predetermined type on an allocated shared memory location accessed by the plurality of threads; and, determining an evaluation function over arguments comprising values operated on or obtained in performing the atomic memory operation of the predetermined type on the allocated shared memory location by each of the plurality of threads; wherein the evaluation function is determined based on the atomic memory operation of the predetermined type such that a result thereof is not effected by an order in which each of the plurality of threads performs the atomic memory operation of the predetermined type on the allocated shared memory location.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 12, 2019
    Inventors: TOM HAR'EL KOLAN, Hillel Mendelson, Vitali Sokhin
  • Patent number: 10496449
    Abstract: A computer-implemented method, computerized apparatus and computer program product for verification of atomic memory operations are disclosed. The method comprising: independently generating for each of a plurality of threads at least one instruction for performing an atomic memory operation of a predetermined type on an allocated shared memory location accessed by the plurality of threads; and, determining an evaluation function over arguments comprising values operated on or obtained in performing the atomic memory operation of the predetermined type on the allocated shared memory location by each of the plurality of threads; wherein the evaluation function is determined based on the atomic memory operation of the predetermined type such that a result thereof is not effected by an order in which each of the plurality of threads performs the atomic memory operation of the predetermined type on the allocated shared memory location.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: December 3, 2019
    Assignee: International Business Machines Corporation
    Inventors: Tom Har'el Kolan, Hillel Mendelson, Vitali Sokhin