Abstract: An apparatus including a circuit device and a composite package substrate. A system including a computing device including a microprocessor, the microprocessor coupled to a printed circuit board through a first substrate and a second substrate, wherein the second substrate includes a thickness that is less that a thickness of the first substrate. An apparatus including a first package substrate for a circuit device to be mounted thereon and a second substrate coupled to the first substrate, wherein the second substrate includes a thickness that is less than a thickness of the first substrate. A method including coupling a first substrate to a second substrate and coupling a circuit device to the first substrate, wherein the first substrate includes a surface area that is less than a surface area of the second substrate.

Abstract: A method of fabricating semiconductor packages from a lead frame strip which includes a mold cap applied to one side thereof, and defines a multiplicity of lead frames integrally connected to each other by connecting bars which extend in multiple rows and columns and define saw streets. In the singulation method of the present invention, the mold cap is sawed along the saw streets to expose the connecting bars. Thereafter, the connecting bars are chemically etched to separate the lead frames from each other.

Abstract: An integrated circuit chip package comprising a lead frame having an integrated circuit die electrically connected thereto. Partially encapsulating the lead frame and the integrated circuit die is a package body. The package body includes the central portion which is circumvented by a peripheral portion defining opposed top and bottom surfaces. Disposed in at least one of the top and bottom surfaces of the peripheral portion of the package body is a singulation crease. The singulation crease, which is formed in the package body during its molding process, is used to provide a stress concentration line which reduces stress along the edge of the chip package and avoids chipping and cracking problems during the punch singulation process used to complete the manufacture of the same.

Abstract: An integrated circuit chip package comprising a lead frame having an integrated circuit die electrically connected thereto. Partially encapsulating the lead frame and the integrated circuit die is a package body. The package body includes the central portion which is circumvented by a peripheral portion defining opposed top and bottom surfaces. Disposed in at least one of the top and bottom surfaces of the peripheral portion of the package body is a singulation crease. The singulation crease, which is formed in the package body during its molding process, is used to provide a stress concentration line which reduces stress along the edge of the chip package and avoids chipping and cracking problems during the punch singulation process used to complete the manufacture of the same.