Patents by Inventor Tom K. Castro

Tom K. Castro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11699753
    Abstract: A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: July 11, 2023
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Tom K. Castro, Rajwinder Singh, Badredin Fatemizadeh, Adam Brand, John Xia, Chi-Nung Ni, Marco A. Zuniga
  • Publication number: 20220254922
    Abstract: A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.
    Type: Application
    Filed: April 25, 2022
    Publication date: August 11, 2022
    Inventors: Tom K. Castro, Rajwinder Singh, Badredin Fatemizadeh, Adam Brand, John Xia, Chi-Nung Ni, Marco A. Zuniga
  • Patent number: 11316044
    Abstract: A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: April 26, 2022
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Tom K. Castro, Rajwinder Singh, Badredin Fatemizadeh, Adam Brand, John Xia, Chi-Nung Ni, Marco A. Zuniga
  • Publication number: 20200243659
    Abstract: A lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate includes (a) a first gate conductor and a second gate conductor each extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure in a thickness direction, (b) a first separation dielectric layer separating the first gate conductor from the second gate conductor within the vertical gate, and (c) a gate dielectric layer separating each of the first gate conductor and the second gate conductor from the silicon semiconductor structure.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Inventors: Tom K. Castro, Marco A. Zuniga, Badredin Fatemizadeh, Adam Brand, John Xia, Rajwinder Singh, Min Xu, Chi-Nung Ni
  • Patent number: 10622452
    Abstract: A lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate includes (a) a first gate conductor and a second gate conductor each extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure in a thickness direction, (b) a first separation dielectric layer separating the first gate conductor from the second gate conductor within the vertical gate, and (c) a gate dielectric layer separating each of the first gate conductor and the second gate conductor from the silicon semiconductor structure.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: April 14, 2020
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Tom K. Castro, Marco A. Zuniga, Badredin Fatemizadeh, Adam Brand, John Xia, Rajwinder Singh, Min Xu, Chi-Nung Ni
  • Patent number: 10573744
    Abstract: A dual-gate, self-aligned lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure, a lateral gate including a first dielectric layer and a first conductive layer stacked on the silicon semiconductor structure in a thickness direction, and a vertical gate. The vertical gate includes a second dielectric layer and a second conductive layer disposed in a trench of the silicon semiconductor structure, the second dielectric layer defining an edge of the lateral gate in a lateral direction. A method for forming a dual-gate, self-aligned LDMOS transistor includes (a) forming a vertical gate of the LDMOS transistor in a trench of a silicon semiconductor structure and (b) defining a lateral edge of a lateral gate of the LDMOS transistor using the vertical gate.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: February 25, 2020
    Assignee: MAXIM INTEGRATED PRODUCTS, INC.
    Inventors: Marco A. Zuniga, Adam Brand, Tom K. Castro, Rajwinder Singh, Badredin Fatemizadeh
  • Publication number: 20190371902
    Abstract: A lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate includes (a) a first gate conductor and a second gate conductor each extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure in a thickness direction, (b) a first separation dielectric layer separating the first gate conductor from the second gate conductor within the vertical gate, and (c) a gate dielectric layer separating each of the first gate conductor and the second gate conductor from the silicon semiconductor structure.
    Type: Application
    Filed: June 5, 2018
    Publication date: December 5, 2019
    Inventors: Tom K. Castro, Marco A. Zuniga, Badredin Fatemizadeh, Adam Brand, John Xia, Rajwinder Singh, Min Xu, Chi-Nung Ni
  • Publication number: 20180350980
    Abstract: A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.
    Type: Application
    Filed: June 5, 2018
    Publication date: December 6, 2018
    Inventors: Tom K. Castro, Rajwinder Singh, Badredin Fatemizadeh, Adam Brand, John Xia, Chi-Nung Ni, Marco A. Zuniga