Patents by Inventor Tom Kinsley
Tom Kinsley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9255964Abstract: The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins.Type: GrantFiled: April 1, 2014Date of Patent: February 9, 2016Assignee: Micron Technology, Inc.Inventor: Tom Kinsley
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Publication number: 20140210498Abstract: The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins.Type: ApplicationFiled: April 1, 2014Publication date: July 31, 2014Applicant: Micron Technology, Inc.Inventor: Tom Kinsley
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Patent number: 8692568Abstract: The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins.Type: GrantFiled: October 3, 2011Date of Patent: April 8, 2014Assignee: Micron Technology, Inc.Inventor: Tom Kinsley
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Publication number: 20140047563Abstract: Various data protection techniques are provided. In one embodiment, a memory device is provided. The memory device may initiate a security measure upon occurrence of one or more triggering events. The one or more triggering events may include receipt of a command signal. Various additional methods, devices, and systems are also provided.Type: ApplicationFiled: October 16, 2013Publication date: February 13, 2014Applicant: ROUND ROCK RESEARCH, LLCInventor: Tom Kinsley
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Patent number: 8565035Abstract: Various data protection techniques are provided. In one embodiment, a memory device is provided. The memory device may initiate a security measure upon occurrence of one or more triggering events. The one or more triggering events may include receipt of a command signal. Various additional methods, devices, and systems are also provided.Type: GrantFiled: September 19, 2011Date of Patent: October 22, 2013Assignee: Round Rock Research, LLCInventor: Tom Kinsley
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Publication number: 20120019274Abstract: The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins.Type: ApplicationFiled: October 3, 2011Publication date: January 26, 2012Inventor: Tom Kinsley
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Publication number: 20120008440Abstract: Various data protection techniques are provided. In one embodiment, a memory device is provided. The memory device may initiate a security measure upon occurrence of one or more triggering events. The one or more triggering events may include receipt of a command signal. Various additional methods, devices, and systems are also provided.Type: ApplicationFiled: September 19, 2011Publication date: January 12, 2012Applicant: Micron Technology, Inc.Inventor: Tom Kinsley
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Patent number: 8030952Abstract: The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins.Type: GrantFiled: July 28, 2006Date of Patent: October 4, 2011Assignee: Micron Technology, Inc.Inventor: Tom Kinsley
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Patent number: 8023344Abstract: Various data protection techniques are provided. In one embodiment, a memory device is provided. The memory device may initiate a security measure upon occurrence of one or more triggering events. The one or more triggering events may include receipt of a command signal. Various additional methods, devices, and systems are also provided.Type: GrantFiled: June 30, 2010Date of Patent: September 20, 2011Assignee: Micron Technology, Inc.Inventor: Tom Kinsley
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Publication number: 20100265781Abstract: Various data protection techniques are provided. In one embodiment, a memory device is provided. The memory device may initiate a security measure upon occurrence of one or more triggering events. The one or more triggering events may include receipt of a command signal. Various additional methods, devices, and systems are also provided.Type: ApplicationFiled: June 30, 2010Publication date: October 21, 2010Applicant: Micron Technology, Inc.Inventor: Tom Kinsley
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Patent number: 7751263Abstract: Various data protection techniques are provided. In one embodiment, a method includes manufacturing a memory component of an electronic system. Manufacturing the memory component may include disposing a memory array on a substrate and coupling a control circuit to the memory array. The control circuit may be configured to selectively prevent access to data stored within the memory array upon removal of the memory component from the electronic system. Various additional methods, devices, and systems are also provided.Type: GrantFiled: January 12, 2009Date of Patent: July 6, 2010Assignee: Micron Technology, Inc.Inventor: Tom Kinsley
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Publication number: 20090153181Abstract: Various data protection techniques are provided. In one embodiment, a method includes manufacturing a memory component of an electronic system. Manufacturing the memory component may include disposing a memory array on a substrate and coupling a control circuit to the memory array. The control circuit may be configured to selectively prevent access to data stored within the memory array upon removal of the memory component from the electronic system. Various additional methods, devices, and systems are also provided.Type: ApplicationFiled: January 12, 2009Publication date: June 18, 2009Applicant: MICRON TECHNOLOGY, INC.Inventor: Tom Kinsley
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Patent number: 7477554Abstract: A method for operating a memory device is disclosed. In one embodiment, the method includes receiving authorized operating parameters of the memory device and comparing sensed operational parameters to the authorized operating parameters. Access to data stored within the memory device may be prevented if the operational parameters are outside the authorized operating parameters. A memory device and method of manufacturing such a device are also provided.Type: GrantFiled: July 20, 2006Date of Patent: January 13, 2009Assignee: Micron Technology, Inc.Inventor: Tom Kinsley
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Publication number: 20070030020Abstract: The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins.Type: ApplicationFiled: July 28, 2006Publication date: February 8, 2007Inventor: Tom Kinsley
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Publication number: 20070030019Abstract: The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins.Type: ApplicationFiled: August 4, 2005Publication date: February 8, 2007Inventor: Tom Kinsley
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Patent number: 7164611Abstract: A secure memory device that is configured to prevent unauthorized access of data is disclosed. More specifically, a kill function logic device is capable of initiating security measures upon the occurrence of some event. The security measures may include disabling read access to the memory device, accelerated erasing of the memory device, or disabling of the memory device itself. Alternatively, a circuit may be configured to purge data stored in the memory device in an accelerated fashion.Type: GrantFiled: October 26, 2004Date of Patent: January 16, 2007Assignee: Micron Technology, Inc.Inventor: Tom Kinsley
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Publication number: 20060294291Abstract: A method for operating a memory device is disclosed. In one embodiment, the method includes receiving authorized operating parameters of the memory device and comparing sensed operational parameters to the authorized operating parameters. Access to data stored within the memory device may be prevented if the operational parameters are outside the authorized operating parameters. A memory device and method of manufacturing such a device are also provided.Type: ApplicationFiled: July 20, 2006Publication date: December 28, 2006Inventor: Tom Kinsley
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Publication number: 20060087882Abstract: A secure memory device that is configured to prevent unauthorized access of data is disclosed. More specifically, a kill function logic device is capable of initiating security measures upon the occurrence of some event. The security measures may include disabling read access to the memory device, accelerated erasing of the memory device, or disabling of the memory device itself. Alternatively, a circuit may be configured to purge data stored in the memory device in an accelerated fashion.Type: ApplicationFiled: October 26, 2004Publication date: April 27, 2006Inventor: Tom Kinsley