Abstract: A wireless audio receiver system and method is provided that is capable of receiving one or more radio frequency (RF) signals containing audio signals modulated by analog and/or digital modulation schemes, operating in full diversity mode or switched diversity mode, demodulating the RF signals, and outputting analog audio signals and a combined digital audio signal. The system and method switches multiple diversity antennas to route received RF signals to respective RF signal processing paths. Digitized passband modulated signals are demodulated to generate analog audio signals, and a combined digital audio signal with one or multiple channels may also be generated. The system and method are capable of demodulating signals modulated using a wide variety of modulation schemes. Reconfigurable computing components are utilized to demodulate digitized passband modulated signals and generate the analog audio signals and combined digital audio signal.

Abstract: A wireless audio receiver system and method is provided that is capable of receiving one or more radio frequency (RF) signals containing audio signals modulated by analog and/or digital modulation schemes, operating in full diversity mode or switched diversity mode, demodulating the RF signals, and outputting analog audio signals and a combined digital audio signal. The system and method switches multiple diversity antennas to route received RF signals to respective RF signal processing paths. Digitized passband modulated signals are demodulated to generate analog audio signals, and a combined digital audio signal with one or multiple channels may also be generated. The system and method are capable of demodulating signals modulated using a wide variety of modulation schemes. Reconfigurable computing components are utilized to demodulate digitized passband modulated signals and generate the analog audio signals and combined digital audio signal.

Abstract: A phase-locked loop system having as input a stable refernce clock signal and outputting a master clock signal. The phase of the stable reference clock signal is compared to that of the pre-scaled master clock signal and the difference represented by an analog error signal which is converted to a digital signal by an A/D converter (116). The digital signal is then transformed into an analog control signal by a D/A converter (120) and applied to a VCO (128) which generates the master clock signal, If the stable reference clock signal has degraded or is lost the A/D converter (116), which receives its sampling clock in part from the stable reference clock signal, stops sampling and thus stops producing digital signals. The last good digital signal is maintained, the last good analog control signal is maintained and thus the master clock signal is maintained.