Abstract: A computing system that enables data stored in a persistent memory region to be preserved when a processor fails can include volatile memory comprising the persistent memory region, non-volatile memory, and a system on a chip (SoC). The SoC can include a main processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include an auxiliary processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include instructions that are executable by the auxiliary processor to cause the data in the persistent memory region of the volatile memory to be transferred to the non-volatile memory in response to a failure of the main processor.

Abstract: A method for targeted repair of a hardware component in a computing device that is part of a cloud computing system includes monitoring a plurality of hardware components in the computing device. At some point, a defective sub-component within the hardware component of the computing device is identified. In addition to the defective sub-component, the hardware component also includes at least one sub-component that is functioning properly and a spare component that can be used in place of the defective sub-component. The method also includes initiating a targeted repair action while the computing device is connected to the cloud computing system. The targeted repair action prevents the defective sub-component from being used by the computing device without preventing sub-components that are functioning properly from being used by the computing device. The targeted repair action causes the spare component to be used in place of the defective sub-component.

Abstract: A computing system that enables data stored in a persistent memory region to be preserved when a processor fails can include volatile memory comprising the persistent memory region, non-volatile memory, and a system on a chip (SoC). The SoC can include a main processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include an auxiliary processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include instructions that are executable by the auxiliary processor to cause the data in the persistent memory region of the volatile memory to be transferred to the non-volatile memory in response to a failure of the main processor.

Abstract: To preserve error context during a reboot of a computing device, firmware within the computing device can be configured to implement a method that includes determining where the error context is stored in volatile memory. The method can also include identifying a plurality of recorder regions in non-volatile memory that have been assigned to store the error context. The plurality of recorder regions can be disaggregated across a plurality of distinct non-volatile memory regions. The method can also include flushing the error context from a plurality of different volatile memory locations to the plurality of recorder regions in response to detecting a trigger. The flushing can occur prior to the reboot of the computing device. The method can also include restoring at least some of the error context to the volatile memory after the computing device has been rebooted.

Abstract: To preserve error context during a reboot of a computing device, firmware within the computing device can be configured to implement a method that includes determining where the error context is stored in volatile memory. The method can also include identifying a plurality of recorder regions in non-volatile memory that have been assigned to store the error context. The plurality of recorder regions can be disaggregated across a plurality of distinct non-volatile memory regions. The method can also include flushing the error context from a plurality of different volatile memory locations to the plurality of recorder regions in response to detecting a trigger. The flushing can occur prior to the reboot of the computing device. The method can also include restoring at least some of the error context to the volatile memory after the computing device has been rebooted.

Abstract: Technologies are described which permit kernel updates or firmware fixes, and include re-initialization of kernel data structures, without losing user context information that has been created by services, virtual machines, or user applications. Tailored code in a server or other computing system sets a kernel soft reset (KSR) indicator and saves the user context to non-volatile storage. When a KSR is underway, boot code skips the power on self-test and similar initializations (thereby reducing downtime), loads a kernel image, initializes kernel data structures, restores the user context, and passes control to the initialized kernel to continue computing system operation with the same user context. Device drivers may also be re-initialized. The loaded kernel may use newly fixed firmware, or may have a security patch installed, for instance. The non-volatile storage may operate at RAM speed, e.g., it may include NVDIMM memory. The kernel may be validated before receiving control.

Abstract: A method for targeted repair of a hardware component in a computing device that is part of a cloud computing system includes monitoring a plurality of hardware components in the computing device. At some point, a defective sub-component within the hardware component of the computing device is identified. In addition to the defective sub-component, the hardware component also includes at least one sub-component that is functioning properly and a spare component that can be used in place of the defective sub-component. The method also includes initiating a targeted repair action while the computing device is connected to the cloud computing system. The targeted repair action prevents the defective sub-component from being used by the computing device without preventing sub-components that are functioning properly from being used by the computing device. The targeted repair action causes the spare component to be used in place of the defective sub-component.

Abstract: A computing device including a memory module. The computing device may further include a processor configured to, by executing instructions of an operating system, divide a non-volatile region of the memory module into a first non-volatile storage partition allocated to the operating system and a second non-volatile storage partition allocated to system firmware. The processor may write a globally unique identifier (GUID) to the non-volatile region. The GUID may indicate a location of a boundary between the first non-volatile storage partition and the second non-volatile storage partition. The processor may access the first non-volatile storage partition. By executing instructions of the system firmware, the processor may determine the location of the boundary. The processor may access the second non-volatile storage partition.

Abstract: An error-handling system provides detection of an error on an I/O hardware endpoint, triggering of an operating system interrupt in response to detected error, reception of the interrupt at an operating system component, determination, in response to the received interrupt, whether to handle the error using an operating system handler or a firmware error handler associated with the I/O hardware endpoint, and, if it is determined to handle the error using a firmware runtime error handler associated with the I/O hardware endpoint, triggering of a firmware interrupt associated with the firmware runtime error handler.

Abstract: A computing device including a memory module. The computing device may further include a processor configured to, by executing instructions of an operating system, divide a non-volatile region of the memory module into a first non-volatile storage partition allocated to the operating system and a second non-volatile storage partition allocated to system firmware. The processor may write a globally unique identifier (GUID) to the non-volatile region. The GUID may indicate a location of a boundary between the first non-volatile storage partition and the second non-volatile storage partition. The processor may access the first non-volatile storage partition. By executing instructions of the system firmware, the processor may determine the location of the boundary. The processor may access the second non-volatile storage partition.

Abstract: One or more energy storage device health parameters are monitored in a computing device. Backup of a volatile portion of a memory device such as a non-volatile dual in-line memory module (NVDIMM) is initiated based on the one or more monitored energy storage device parameters satisfying a predetermined operational condition. Example energy storage device health parameters include a State of Health (SOH) parameter and a State of Charge (SOC) parameter.

Abstract: An error-handling system provides detection of an error on an I/O hardware endpoint, triggering of an operating system interrupt in response to detected error, reception of the interrupt at an operating system component, determination, in response to the received interrupt, whether to handle the error using an operating system handler or a firmware error handler associated with the I/O hardware endpoint, and, if it is determined to handle the error using a firmware runtime error handler associated with the I/O hardware endpoint, triggering of a firmware interrupt associated with the firmware runtime error handler.

Abstract: Technologies are described which permit kernel updates or firmware fixes, and include re-initialization of kernel data structures, without losing user context information that has been created by services, virtual machines, or user applications. Tailored code in a server or other computing system sets a kernel soft reset (KSR) indicator and saves the user context to non-volatile storage. When a KSR is underway, boot code skips the power on self-test and similar initializations (thereby reducing downtime), loads a kernel image, initializes kernel data structures, restores the user context, and passes control to the initialized kernel to continue computing system operation with the same user context. Device drivers may also be re-initialized. The loaded kernel may use newly fixed firmware, or may have a security patch installed, for instance. The non-volatile storage may operate at RAM speed, e.g., it may include NVDIMM memory. The kernel may be validated before receiving control.

Abstract: A method for securely updating a basic input/output system (BIOS) using a multi-layer scheme. A new BIOS image is received and stored at a computer system. In one embodiment, the new BIOS image is sent to the computer system in a BIOS capsule that also contains the data structure and instructions of how to build a new BIOS image for the computer system. The current BIOS image of the computer system is maintained in a first portion of the BIOS. An access check verifies the integrity of a data structure representation of the current BIOS image. An administration check verifies that proper authority has requested the BIOS update. A checksum is performed on the new BIOS image while writing the new BIOS image to a second portion of the BIOS. Once the new BIOS image passes the multi-layer check, indicia is provided such that the computer system loads BIOS instructions from the new BIOS image on subsequent boots of the computer system.

Abstract: A method for securely updating a basic input/output system (BIOS) using a multi-layer scheme. A new BIOS image is received and stored at a computer system. In one embodiment, the new BIOS image is sent to the computer system in a BIOS capsule that also contains the data structure and instructions of how to build a new BIOS image for the computer system.

Abstract: A BIOS memory including multiple memory blocks, with two or more memory blocks of the multiple memory blocks configured to store boot code.