Patents by Inventor Tom Mountsier

Tom Mountsier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8709948
    Abstract: Apparatus and methods for filling through silicon vias (TSV's) with copper having an intervening tungsten layer between the copper plug and the silicon are disclosed. Methods are useful for Damascene processing, with or without a TSV feature. The tungsten layer serves as a diffusion barrier, a seed layer for copper electrofill and a means of reducing CTE-induced stresses between copper and silicon. Adhesion of the tungsten layer to the silicon and of the copper layer to the tungsten is described.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: April 29, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Michal Danek, Tom Mountsier, Jonathan Reid, Juwen Gao, Aaron Fellis
  • Patent number: 8173537
    Abstract: Stability of an underlying dielectric diffusion barrier during deposition and ultraviolet (UV) processing of an overlying dielectric layer is critical for successful integration. UV-resistant diffusion barrier layers are formed by depositing the layer in a hydrogen-starved environment. Diffusion barrier layers can be made more resistant to UV radiation by thermal, plasma, or UV treatment during or after deposition. Lowering the modulus of the diffusion barrier layer can also improve the resistance to UV radiation.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: May 8, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Kaushik Chattopadhyay, Keith Fox, Tom Mountsier, Hui-Jung Wu, Bart van Schravendijk, Kimberly Branshaw
  • Patent number: 8124522
    Abstract: Provided are methods of stabilizing an underlying dielectric diffusion barrier during deposition and ultraviolet (UV) processing of an overlying dielectric layer. Methods include modulating the optical properties reduces the effects of UV radiation on the dielectric diffusion barrier layer. The dielectric diffusion barrier can be made to absorb less UV radiation. A dielectric layer with UV absorbing properties may also be added on top of the diffusion barrier layer so less UV is transmitted. Both methods result in reduced interaction between UV radiation and the dielectric diffusion barrier.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: February 28, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Hui-Jung Wu, Kimberly Shafi, Kaushik Chattopadhyay, Keith Fox, Tom Mountsier, Girish Dixit, Bart van Schravendijk, Elizabeth Apen
  • Publication number: 20110221044
    Abstract: Apparatus and methods for filling through silicon vias (TSV's) with copper having an intervening tungsten layer between the copper plug and the silicon are disclosed. Methods are useful for Damascene processing, with or without a TSV feature. The tungsten layer serves as a diffusion barrier, a seed layer for copper electrofill and a means of reducing CTE-induced stresses between copper and silicon. Adhesion of the tungsten layer to the silicon and of the copper layer to the tungsten is described.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 15, 2011
    Inventors: Michal Danek, Tom Mountsier, Jonathan Reid, Juwen Gao, Aaron Fellis
  • Patent number: 8003549
    Abstract: A nitrogen-free anti-reflective layer for use in semiconductor photolithography is fabricated in a chemical vapor deposition process, optionally plasma-enhanced, using a gaseous mixture of carbon, silicon, and oxygen sources. By varying the process parameters, a substantially hermetic layer with acceptable values of the refractive index n and extinction coefficient k can be obtained. The nitrogen-free moisture barrier anti-reflective layer produced by this technique improves plasma etch of features such as vias in subsequent processing steps.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: August 23, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Ming Li, Bart Van Schravendijk, Tom Mountsier, Chiu Chi, Kevin Ilcisin, Julian Hsieh
  • Patent number: 7682966
    Abstract: Metal seed layers are deposited on a semiconductor substrate having recessed features by a method that involves at least three operations. In this method, a first layer of metal is deposited onto the substrate to cover at least the bottom portions of the recessed features. The first layer of metal is subsequently redistributed to improve sidewall coverage of the recessed features. Next, a second layer of metal is deposited on at least the field region of the substrate and on the bottom portions of the recessed features. The method can be implemented using a PVD apparatus that allows deposition and resputtering operations. This sequence of operations can afford seed layers with improved step coverage. It also leads to decreased formation of voids in interconnects, and to improved resistance characteristics of formed IC devices.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: March 23, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Robert Rozbicki, Bart van Schravendijk, Tom Mountsier, Wen Wu
  • Patent number: 7642202
    Abstract: A nitrogen-free anti-reflective layer for use in semiconductor photolithography is fabricated in a chemical vapor deposition process, optionally plasma-enhanced, using a gaseous mixture of carbon, silicon, and oxygen sources. By varying the process parameters, a substantially hermetic layer with acceptable values of the refractive index n and extinction coefficient k can be obtained. The nitrogen-free moisture barrier anti-reflective layer produced by this technique improves plasma etch of features such as vias in subsequent processing steps.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: January 5, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Ming Li, Bart Van Schravendijk, Tom Mountsier, Chiu Chi, Kevin Ilcisin, Julian Hsieh
  • Patent number: 7052988
    Abstract: A nitrogen-free anti-reflective layer for use in semiconductor photolithography is fabricated in a chemical vapor deposition process, optionally plasma-enhanced, using a gaseous mixture of carbon, silicon, and oxygen sources. By varying the process parameters, acceptable values of the refractive index n and extinction coefficient k can be obtained. The nitrogen-free anti-reflective layer produced by this technique eliminates the mushrooming and footing problems found with conventional anti-reflective layers.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: May 30, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Bart van Schravendijk, Ming Li, Jason Tian, Tom Mountsier, M. Ziaul Karim
  • Patent number: 6720251
    Abstract: A nitrogen-free anti-reflective layer for use in semiconductor photolithography is fabricated in a chemical vapor deposition process, optionally plasma-enhanced, using a gaseous mixture of carbon, silicon, and oxygen sources. By varying the process parameters, acceptable values of the refractive index n and extinction coefficient k can be obtained. The nitrogen-free anti-reflective layer produced by this technique eliminates the mushrooming and footing problems found with conventional anti-reflective layers.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: April 13, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Bart van Schravendijk, Ming Li, Jason Tian, Tom Mountsier, M. Zlaul Karim