Patents by Inventor Tom P. Leavy

Tom P. Leavy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Edge arrangements for integrated circuit chips
    Patent number: 7087452
    Abstract: A method is provided for forming microelectronic devices. This may include providing a wafer device having metallization layers, a plurality of integrated circuits and a channel area provided around each of the integrated circuits. Materials from within each channel area may be removed by etching or by laser to form an air gap around a perimeter of each integrated circuit. Each air gap may prevent cracking and/or delamination problems caused by a subsequent dicing of the wafer device by a wafer saw into a plurality of devices.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: August 8, 2006
    Assignee: Intel Corporation
    Inventors: Subhash M. Joshi, Tom P. Leavy, Binny Arcot, Jun He
  • Edge arrangements for integrated circuit chips
    Publication number: 20040212047
    Abstract: A method is provided for forming microelectronic devices. This may include providing a wafer device having metallization layers, a plurality of integrated circuits and a channel area provided around each of the integrated circuits. Materials from within each channel area may be removed by etching or by laser to form an air gap around a perimeter of each integrated circuit. Each air gap may prevent cracking and/or delamination problems caused by a subsequent dicing of the wafer device by a wafer saw into a plurality of devices.
    Type: Application
    Filed: April 22, 2003
    Publication date: October 28, 2004
    Inventors: Subhash M. Joshi, Tom P. Leavy, Binny Arcot, Jun He