Patents by Inventor Tom R. Paur

Tom R. Paur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4918380
    Abstract: A system for measuring the amount and direction of misregistration of each layer of a panel from which multilayer printed circuit boards are separated. The system utilizes a conductor pattern having a conductive trace positioned on each layer of the panel. Each conductive trace includes two trace portions positioned in opposing relation with a plurality of conductive through-holes being positioned therebetween. Each trace portion includes a plurality of elongate conductor portions positioned incrementally varying distances from a common axis. The conductive through-holes are formed in the panel after the layers have been fabricated and joined. If the through-holes are in electrical contact with either trace portion, then the amount of misregistration can be determined. Further, by determining which trace portion the through-hole is in contact with, the direction of misregistration can be determined. By adding additional trace portions, the quantity of misregistration in other directions may be determined.
    Type: Grant
    Filed: October 3, 1988
    Date of Patent: April 17, 1990
    Inventor: Tom R. Paur
  • Patent number: 4894606
    Abstract: A system for measuring the amount of misregistration of layers of multilayer printed circuit boards. The system utilizes a conductive plane having a fixed pattern of apertures and a common contact portion. One plane is attached to each inward layer of the board at the same location for each layer. The aperatures have a predetermined and progressively increasing diameter. Uniform diameter through-hole conductors are formed in the layers after assembled, with one conductor extending through each of the apertures. For a board with all inward layers in perfect registration with the outward layer, incrementally increasing clearances exist between the conductors and the edges of the corresponding apertures. One or more of the conductors is in electrical contact with a plane if the inward layer to which attached is out of registration by an amount at least as great as the corresponding conductor clearance.
    Type: Grant
    Filed: July 7, 1988
    Date of Patent: January 16, 1990
    Inventor: Tom R. Paur