Abstract: Methods and apparatus for scaling soft values as part of an error correction decoding process are described. Accurate decoding depends on use of the appropriate scale factor. Selection and use of the scale factor to scale soft values is designed to improve and/or optimize decoder performance without the need for prior knowledge of the correct scale factor or the actual channel conditions at the time the signal from which the soft values were obtained was transmitted through a communications channel. The techniques of the present invention assume that the soft values to be processed were transmitted through a communications channel having a quality that can be accurately described by a channel quality value. A scale factor is determined from the distribution of soft values to be scaled and an assumption that the channel through which they were transmitted was of the quality corresponding to a preselected channel quality value.

Abstract: Methods and apparatus for communication over a block-coherent communication system are described. The present invention is directed to methods of interleaving coded bits that are encoded by codes, e.g., LDPC codes, having graph structures largely comprised, e.g., of multiple identical copies of a much smaller graph.

Abstract: The claimed subject matter relates to providing uplink data rate option information in an uplink traffic channel segment. A wireless terminal may indicate a data rate option being used for the segment via an energy pattern applied to the tone-symbols of the segment. To indicate a first data rate option, additional energy may be applied to a first set of tone-symbols of the segment. To indicate a second rate option, additional energy may be applied to a second set of tone-symbols of the segment, the second set being different from the first set. According to some aspects, each implemented energy pattern may be represented by a pattern, which has a slope (e.g., in a logical, pre-hopped representation of the channel segment), where some of the patterns have positive slope and some of the patterns have negative slope.

Abstract: Formulation and methods for modulating the delivery of an agent using polysaccharides.

Abstract: Downlink traffic channel data rate options and methods of indicating to a wireless terminal a utilized downlink data rate option are described. The downlink traffic channel rate option for a segment is conveyed using an assignment signal and/or a block in the downlink traffic channel segment which is not used for user data. Downlink segment assignment signals in some implementations allocate fewer bits for rate option indication than are required to uniquely identify each option. In some implementations low rate options, e.g., using QPSK, are uniquely identified via assignment signals. Higher rate options, e.g., using QAM16 modulation, are conveyed via the distinct information block in the downlink traffic segment using a first coding/modulation method. Still higher rate options, e.g., using QAM16, QAM64, or QAM256, are conveyed via the information block in the segment using a second coding/modulation method which is applied to the rate option information.

Abstract: Downlink traffic channel data rate options and methods of indicating to a wireless terminal a utilized downlink data rate option are described. The downlink traffic channel rate option for a segment is conveyed using an assignment signal and/or a block in the downlink traffic channel segment which is not used for user data. Downlink segment assignment signals in some implementations allocate fewer bits for rate option indication than are required to uniquely identify each option. In some implementations low rate options, e.g., using QPSK, are uniquely identified via assignment signals. Higher rate options, e.g., using QAM16 modulation, are conveyed via the distinct information block in the downlink traffic segment using a first coding/modulation method. Still higher rate options, e.g., using QAM16, QAM64, or QAM256, are conveyed via the information block in the segment using a second coding/modulation method which is applied to the rate option information.

Abstract: Methods and apparatus for implementing and/or using amplifiers and performing various amplification related operations are described. The methods are well suited for use with, but not limited to, switching type amplifiers. The methods and apparatus described herein allow for the use of switching amplifiers while reducing and/or compensating for distortions that the use of such amplifiers would normally create. The described methods and apparatus can be used alone or in combination with various novel signaling schemes which can make it easier to compensate for the non-ideal behavior of switching amplifiers in such a way as to enable practical application in wireless transmission and/or other applications.

Abstract: A stream of modulation symbols from a zero symbol rate (ZSR) coding/modulation module and a stream of modulation symbols from another type of coding/modulation module are input into an interweaver module. The interweaver module mixes the two input streams when assigning modulation symbols to be communicated in a segment. If a ZSR modulation symbol is non-zero, the ZSR modulation symbol is allocated a transmission position. If the ZSR modulation symbol is a zero modulation symbol, the modulation symbol from the other coding/modulation module is allocated the transmission position. The non-zero modulation symbols from the ZSR module are higher in power than the non-zero modulation symbols from the other module, thus facilitating detection and recovery.

Abstract: Methods and apparatus for decoding codewords using message passing decoding techniques which are particularly well suited for use with low density parity check (LDPC) codes and long codewords are described. The described methods allow decoding graph structures which are largely comprised of multiple identical copies of a much smaller graph. Copies of the smaller graph are subject to a controlled permutation operation to create the larger graph structure. The same controlled permutations are directly implemented to support message passing between the replicated copies of the small graph. Messages corresponding to individual copies of the graph are stored in a memory and accessed in sets, one from each copy of the graph, using a SIMD read or write instruction. The graph permutation operation may be implemented by simply reordering messages, e.g.

Abstract: Methods and apparatus for decoding codewords using message passing decoding techniques which are particularly well suited for use with low density parity check (LDPC) codes and long codewords are described. The described methods allow decoding graph structures which are largely comprised of multiple identical copies of a much smaller graph. Copies of the smaller graph are subject to a controlled permutation operation to create the larger graph structure. The same controlled permutations are directly implemented to support message passing between the replicated copies of the small graph. Messages corresponding to individual copies of the graph are stored in a memory and accessed in sets, one from each copy of the graph, using a SIMD read or write instruction. The graph permutation operation may be implemented by simply reordering messages, e.g.

Abstract: Methods and apparatus for implementing memory efficient LDPC decodes are described. In accordance with the invention message information is stored in a compressed state for check node processing operations. The state for a check node is fully updated and then subject to an extraction process to generate check node to variable node messages. The signs of messages received from variable nodes may be stored by the check node processor module of the invention for use in message extraction. The check node processor can process messages in variable node order thereby allowing the variable node processor and check node processor to operate on messages in the same order reducing or eliminating the need to buffer and/or reorder messages passed between check nodes and variable nodes. Graph structures which allow check node processing on one graph iteration to proceed before the previous graph iteration has been completed are also described.

Abstract: In modern iterative coding systems such as LDPC decoder and turbo-convolutional decoder in which the invention may be used, the core computations can often be reduced to a sequence of additions and subtractions alternating between logarithm and linear domains A computationally efficient and robust approximation method for log and exp functions is described which involves using a simple bit mapping between fixed point fractional data format and floating point format. The method avoids costly lookup tables and complex computations and further reduces the core processing to a sequence of additions and subtractions using alternating fixed point and floating point processing units.

Abstract: A wireless terminal includes an uplink rate option indicator in the same uplink channel segment with data, the rate option indicator providing transmission rate information about the data transmitted in the segment. The indicator value is represented by an energy pattern within the segment. Different energy patterns correspond to different indicator values. The number of indicator values is less than the number of possible uplink data rate options supported by the wireless terminal. A single indicator value represents different uplink data rate options, at different times, as a function of a received maximum data rate option and/or type of assignment message. The maximum data rate option and/or assignment message was transmitted by the same base station receiving the indicator value; therefore, there is no ambiguity between wireless terminal and base station as to the interpretation of the uplink data rate option indicator value with respect to an individual uplink segment.

Abstract: A wireless terminal receives an uplink traffic channel segment assignment including a maximum uplink rate option indicator. Each uplink rate option corresponds to a number of information bits, coding rate and modulation method. The maximum rate option indicator indicates the highest rate option that the wireless terminal is permitted to use when transmitting in the assigned traffic channel segment from the perspective of the base station. In some embodiments, the wireless terminal uses interference measurements to further quality, e.g., conditionally reduce, the maximum uplink rate option that may be used. Then, the wireless terminal selects an uplink rate option to use which is less than the determined allowed maximum uplink rate option, e.g., based on the amount of user data to communicate. The wireless terminal transmits data in the assigned uplink traffic channel segment in accordance with the wireless terminal selected uplink rate.

Abstract: A device includes a zero symbol rate (ZSR) coding/modulation module and a second type coding/modulation module. Both modules generate modulation symbols to be conveyed using the same air link resources but with the non-zero ZSR symbols having a higher power level. The ZSR module generates a mixture of zero and non-zero modulation symbols. A ZSR modulation scheme communicates information using both the position of the non-zero modulation symbols and the phase and/or amplitude of the non-zero modulation symbols. Different ZSR schemes, implementing different ratios relating the number of zero symbols to the total number of symbols, can be associated with different low data rates while second module modulation schemes can be associated with different high data rates. Modulation symbols from two modules are in some embodiments, superimposed. In some embodiments, non-zero ZSR modulation symbols punch out second module modulation symbols which occupy the same air link resource.

Abstract: A base station selects a maximum rate option indicator value for an uplink communications segment, e.g., uplink traffic channel segment, and transmits the selected indicator value, e.g., as part of the assignment message. The maximum rate option indicator value indicates to the wireless terminal a maximum allowed data rate option that the wireless terminal is permitted to use for the corresponding assigned uplink communications segment, the wireless terminal determining the actual uplink rate option used. Each uplink data rate option corresponds to: a number of information bits to be communicated in an uplink communication segment, a coding rate, and a modulation method. Some embodiments include multiple types of maximum uplink rate option indicators, e.g., a first type using a single bit and a second type using at least three bits. Different modulation methods are, in some embodiments, used for communicating the different types of maximum uplink rate option indicators.

Abstract: A base station selects and assigns uplink segments to specific wireless terminals. The base station estimates potential system interference levels, selects, assigns, and transmits a maximum uplink rate indicator value to a wireless terminal indicating the maximum uplink data rate that the wireless terminal is permitted to use. The wireless terminal receives the maximum data rate indicator and selects an uplink data rate to use which is less than or equal to the maximum data rate indicator level. The selection includes consideration of data amounts, data importance, communications channel quality, changes affecting the channel and/or power information. The wireless terminal encodes information indicative of the selected used rate with the user data/information to be transmitted by placing additional energy on a subset of the uplink signals. The base station receives the uplink signals including user data/information and data rate.

Abstract: High throughput parallel LDPC decoders are designed and implemented using hierarchical design and layout optimization. In a first level of hierarchy, the node processors are grouped on the LDPC decoder chip, physically co-locating the processing elements in a small area. In a second level of hierarchy, clusters, e.g., subsets, of the processing elements are grouped together and a pipeline stage including pipeline registers is introduced on the boundaries between clusters. Register to register path propagating signals are keep localized as much as possible. The switching fabric coupling the node processors with edge message memory is partitioned into separate switches. Each separate switch is split into combinational switching layers. Design hierarchies are created for each layer, localizing the area where the interconnect is dense and resulting in short interconnect paths thus limiting signal delays in routing.

Abstract: Methods and apparatus for implementing memory efficient LDPC decodes are described. In accordance with the invention message information is stored in a compressed state for check node processing operations. The state for a check node is fully updated and then subject to an extraction process to generate check node to variable node messages. The signs of messages received from variable nodes may be stored by the check node processor module of the invention for use in message extraction. The check node processor can process messages in variable node order thereby allowing the variable node processor and check node processor to operate on messages in the same order reducing or eliminating the need to buffer and/or reorder messages passed between check nodes and variable nodes. Graph structures which allow check node processing on one graph iteration to proceed before the previous graph iteration has been completed are also described.

Abstract: A flexible and relatively hardware efficient LDPC encoder is described. The encoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used to control the encoding process. Each command of a relatively simple microcode used to describe the code structure can be stored and executed multiple times to complete the encoding of a codeword. Different codeword lengths can be supported using the same set of microcode instructions but with the code being implemented a different number of times depending on the lifting factor selected to be used. The LDPC encoder can switch between encoding codewords of different lengths, without the need to change the stored code description information, by simply changing a code lifting factor used to control the encoding processes. When coding codewords shorter than the maximum supported codeword length some block storage locations and/or registers may go unused.