Patents by Inventor Tom Tien-Cheng Chiu

Tom Tien-Cheng Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6144325
    Abstract: A register file array for storing or outputting binary logic bits of information encoded in 2B format is disclosed. The array includes an integrated 2B encoder which encodes stored information in 2B format before access by a read port to provide 2B formatted output without significantly affecting memory access time.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: November 7, 2000
    Assignee: International Business Machines Corporation
    Inventors: Tom Tien-Cheng Chiu, Donald George Mikan, Jr., Jeffrey Tuan Anh Nguyen
  • Patent number: 5901079
    Abstract: An improved random-access memory apparatus and method for rapidly reading and writing high-level logic data to and fiom the random-access memory apparatus during phase-driven timing cycles. The improved random-access memory apparatus includes an unbalanced storage circuit for the evanescent storage of binary data, and includes two opposing logic inverters coupled together such that high level logic data can be rapidly written to the unbalanced storage circuit during a write cycle. A first logic inverter is sized larger than a second logic inverter. In addition, the improved random-access memory apparatus includes a circuit for reading and writing binary data to and from the unbalanced storage circuit. The circuit for reading and writing binary data to and from the unbalanced storage circuit operates in a cycle which includes clock phases carried on a phase line to the circuit for reading and writing binary data to and from the unbalanced storage circuit.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: May 4, 1999
    Assignee: International Business Machines Corporation
    Inventors: Tom Tien-Cheng Chiu, Donald George Mikan, Jr., Jeffrey Tuan Nguyen
  • Patent number: 5754885
    Abstract: Control circuitry is used to select M entries from an N-entry storage array by viewing the array from both ends. Beginning at both ends of the array, particular bit values or entry content is looked for by the control logic. Once found at both ends, these entries are then used to produce control signals to be sent to a pair of muxes to remove these entries. Then a subset of the original array consisting of the remaining entries of the array is then iterated upon by a similar set of control circuitry for finding and removing the next M entries from the storage array.
    Type: Grant
    Filed: April 4, 1996
    Date of Patent: May 19, 1998
    Assignee: International Business Machines Corporation
    Inventors: Hoichi Cheong, Tom Tien-Cheng Chiu, Hung Qui Le, Donald George Mikan, Jr.
  • Patent number: 5668525
    Abstract: Comparative circuits 10, 100 for comparing a first address comprising at least two bits to a second address comprising an equal number of corresponding bits as the first address to determine if the first address equals or does not equal the second address as disclosed. Comparative circuits 10, 100 include two bit to four bit encoders for encoding each two bits of the first address into a first four bit representation, wherein each bit has an on state and an off state and only one of the four bits is in the on state at one time, each two bits of the second address into a second four bit representation, wherein each bit corresponds to a bit from the first four bit representation. The four bit representations are then inputted into the remainder of the comparator circuits 10, 100.
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: September 16, 1997
    Assignee: International Business Machines Corporation
    Inventors: Tom Tien-Cheng Chiu, Donald George Mikan, Jr., John Stephen Muhich