Abstract: An asynchronous digital sample rate converter includes a random access memory for storing input data values and a read only memory for storing a reduced set of interpolation filter coefficients. Input data is written to the random access memory at the input sample rate. Output samples are provided from a multiply/accumulate engine which given a stream of input data and filter coefficients produces an output sample upon request at the output frequency. The initial address for reading input data from the random access memory, and the addresses for coefficients from the read only memory are provided by an auto-centering scheme which is a first order closed loop system with a digital integrator fed by an approximation of the input to output sample rate ratio. This auto-centering scheme may include a feed forward low pass filter to cancel steady state error, and an interpolated write address to reduce noise.

Abstract: A scrambler for use with thermometer-code digital signals and having a number of interconnected identical switching cells in the form of swapper cells with two inputs and two outputs. A control signal determines whether the inputs are connected directly or reversely to the outputs. The control signal is developed by logic circuitry which receives as inputs the two swapper cell input bits and a state bit representing the integrated difference of past swapper output signals.