Abstract: A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.

Abstract: A single instruction multiple data processor may accomplish register allocation by identifying live ranges that have incompatible write masks during compilation. Then, edges are added in an interference graph between live ranges that have incompatible masks so that those live ranges will not be assigned to the same physical register.

Abstract: A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.

Abstract: A single instruction multiple data processor may accomplish register allocation by identifying live ranges that have incompatible write masks during compilation. Then, edges are added in an interference graph between live ranges that have incompatible masks so that those live ranges will not be assigned to the same physical register.

Abstract: Embodiments of a hardware accelerator having a circuit configurable to perform a plurality of matrix operations and Fast Fourier Transforms (FFT) are presented herein.

Abstract: Access points in wireless networks provide contention free access to stations through polling. Polling frames are transmitted to stations at polling intervals. Stations may transmit polling alignment requests to the access point to request a modification of the polling interval. Virtual polling is provided by publishing a virtual polling schedule. Stations respond to the virtual polling schedule without receiving polling frames. Polling intervals used during virtual polling may be modified in response to polling alignment requests from mobile stations.

Abstract: Embodiments of a hardware accelerator having a circuit configurable to perform a plurality of matrix operations and Fast Fourier Transforms (FFT) are presented herein.

Abstract: A system and method for prioritizing the transmission of packets in a wireless local area network. A station selects a packet from local priority queuing and identifies the priority bits of the packet. The station declares the priority of the selected packet based on the binary value of the priority bits. If the station detects that another station has selected a packet with a higher priority, then the station ceases to contend for transmission during the current transmission cycle.

Abstract: A system and method for prioritizing the transmission of packets in a wireless local area network. A station selects a packet from local priority queuing and identifies the priority bits of the packet. The station declares the priority of the selected packet based on the binary value of the priority bits. If the station detects that another station has selected a packet with a higher priority, then the station ceases to contend for transmission during the current transmission cycle.

Abstract: Briefly, in accordance with one embodiment of the invention, an apparatus with capabilities to communicate in a wireless network, comprising a channel access scheme providing access to the wireless network, the access scheme using a modulo N backoff scheme providing a modulo N backoff; and the channel access scheme further providing traffic prioritization

Abstract: Polling intervals may be modified in response to polling alignment requests from mobile stations.

Abstract: A system and method for prioritizing the transmission of packets in a wireless local area network. A station selects a packet from local priority queuing and identifies the priority bits of the packet. The station declares the priority of the selected packet based on the binary value of the priority bits. If the station detects that another station has selected a packet with a higher priority, then the station ceases to contend for transmission during the current transmission cycle.