Patents by Inventor Tomer Ben-or

Tomer Ben-or has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7627687
    Abstract: Method and apparatus to provide a data replication system to receive a data transfer request from a first component at a transmitter module in a continuous data replication system having a production site and a backup site, the production site having a transmitter module and a transmitter credit mechanism, the transmitter module to transmit data over a network for replication in the backup site, detect a high-load condition at the transmitter module, and modify a flow of credits from the transmitter credit mechanism to the first component to reduce or stop data flow to the transmitter module.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: December 1, 2009
    Assignee: EMC Israel Development Center, Ltd.
    Inventors: Shlomo Ahal, Assaf Natanzon, Yuval Aharoni, Saar Cohen, Tomer Ben-or
  • Publication number: 20080082591
    Abstract: Method and apparatus to provide a data replication system to receive a data transfer request from a first component at a transmitter module in a continuous data replication system having a production site and a backup site, the production site having a transmitter module and a transmitter credit mechanism, the transmitter module to transmit data over a network for replication in the backup site, detect a high-load condition at the transmitter module, and modify a flow of credits from the transmitter credit mechanism to the first component to reduce or stop data flow to the transmitter module.
    Type: Application
    Filed: September 28, 2006
    Publication date: April 3, 2008
    Inventors: Shlomo Ahal, Assaf Natanzon, Yuval Aharoni, Saar Cohen, Tomer Ben-or
  • Patent number: 6903390
    Abstract: A customizable integrated circuit including a substrate, a plurality of logic units formed on the substrate and a plurality of metal routing layers formed on the substrate for interconnecting the plurality of logic units. The plurality of metal routing layers includes a first routing layer including a plurality of elongate conductors extending generally in a given direction, a second routing layer including a plurality of transversely extending conductors, each adapted for interconnecting a termination of one of the plurality of elongate conductors to a beginning of another one of the plurality of elongate conductors and at least a third routing layer, including a plurality of local routing conductors, a plurality of customizable connections between pairs of the plurality of elongate conductors via individual ones of the plurality of transversely extending conductors and customizable connections between individual elongate conductors and a plurality of individual local routing conductors.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: June 7, 2005
    Assignee: Chip Express (Israel) Ltd.
    Inventors: Lior Amrilio, Tomer Ben-Chen, Uzi Yoeli
  • Publication number: 20040093577
    Abstract: A customizable integrated circuit including a substrate, a plurality of logic units formed on the substrate and a plurality of metal routing layers formed on the substrate for interconnecting the plurality of logic units.
    Type: Application
    Filed: November 24, 2003
    Publication date: May 13, 2004
    Inventors: Lior Amrilio, Tomer Ben-Chen, Uzi Yoeli
  • Publication number: 20040034718
    Abstract: A method for receiving messages containing data conveyed over a network, using a network adapter coupled to a computing device having a system memory associated therewith. At least one queue of descriptors is generated in the system memory, each such descriptor indicating a disposition of the data contained in the messages to be received over the network. At least one of the descriptors is prefetched from the at least one queue in the system memory to a cache memory in the network adapter. When one of the messages is received at the network adapter, the adapter processes the at least one of the received messages so as to cause the data contained therein to be distributed in accordance with the at least one prefetched descriptor in the cache memory.
    Type: Application
    Filed: August 15, 2002
    Publication date: February 19, 2004
    Inventors: Dror Goldenberg, Eyal Rond, Tomer Ben-David
  • Patent number: 6459136
    Abstract: A customizable integrated circuit including a plurality of electrically conducting routing layers formed on a substrate for interconnecting a plurality of logic units formed on the substrate, including a first routing layer including a plurality of elongate conductors extending generally in a given direction, a second routing layer including a plurality of transversely extending conductors, each adapted for interconnecting a termination of one of the plurality of elongate conductors to a beginning of another one of the plurality of elongate conductors; and at least a third routing layer including a plurality of local routing conductors, a plurality of customizable connections, preferably arranged generally in at least one row, between pairs of the plurality of elongate conductors via individual ones of the plurality of transversely extending conductors and, preferably, customizable connections between individual ones of the plurality of elongate conductors and a plurality of individual ones of the local routi
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: October 1, 2002
    Assignee: Chip Express (Israel) Ltd.
    Inventors: Lior Amarilio, Tomer Ben-Chen, Uzi Yoeli