Patents by Inventor Tomer SAVARIEGO

Tomer SAVARIEGO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240104043
    Abstract: Embodiments herein relate to a module which can be inserted into or removed from a computing device by a user. The module includes an input-output port which is configured for a desired specification, such as USB-A, USB-C, Thunderbolt, DisplayPort or HDMI. The port can be provided on an expansion card such as an M.2 card for communicating with a host platform. The host platform can communicate with different types of modules in a standardized way so that complexity and costs are reduced. In another aspect, with a dual port module, the host platform can concurrently send/receive power through one port and send/receive data from the other port.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Inventors: Shailendra Singh Chauhan, Nirmala Bailur, Reza M. Zamani, Jackson Chung Peng Kong, Charuhasini Sunder Raman, Venkataramani Gopalakrishnan, Chuen Ming Tan, Sreejith Satheesakurup, Karthi Kaliswamy, Venkata Mahesh Gunnam, Yi Jen Huang, Kie Woon Lim, Dhinesh Sasidaran, Pik Shen Chee, Venkataramana Kotakonda, Kunal A. Shah, Ramesh Vankunavath, Siva Prasad Jangili Ganga, Ravali Pampala, Uma Medepalli, Tomer Savariego, Naznin Banu Wahab, Sindhusha Kodali, Manjunatha Venkatarauyappa, Surendar Jeevarathinam, Madhura Shetty, Deepak Sharma, Rohit Sharad Mahajan
  • Publication number: 20240019918
    Abstract: A power delivery architecture is described that improves system voltage conversion and operational efficiency. The power delivery architecture performs monitoring of various system conditions such as a current power state, a current power policy setting, workload conditions, component temperatures, a state of charge of a battery, etc. The power delivery architecture may adjust the power profile provided by a power delivery source, which may result in an adjustment to the VBUS voltage and/or current when a USB-based power delivery architecture is implemented. The power delivery architecture may also adjust a mode of operation of an onboard battery charger.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 18, 2024
    Inventors: Ravi Verma, Saunak Bhalsod, Venkataramani Gopalakrishnan, Archana Rao, Raghavendra Rao, Tomer Savariego, Chuen Ming Tan, Manjunatha V
  • Publication number: 20230096631
    Abstract: Universal Serial Bus (USB) Power Delivery is augmented by allowing devices that attach to the USB to include and/or have access to an enhanced device policy manager (eDPM) so that device information such as status, state, or requirements, such as power requirements, may be at least be shared by the eDPMs between, for example, a host device on the bus, a secondary device providing power to devices on the bus, and a new device attaching to the bus. Sharing device information facilitates the host having contextual awareness for the attaching device and assists with determining whether the attaching device may be enumerated on the bus. If not, such as due to insufficient power available from the secondary device, the host and/or secondary device may seek to influence bus devices to change an operating mode to accommodate the attaching device.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Rajaram Regupathy, Saranya Gopal, Oren Novitzky, Tomer Savariego, Vrukesh V. Panse
  • Publication number: 20220408561
    Abstract: A novel method and interface are provided to generalize power delivery (PD) solutions and allow OEMs and suppliers to easily replace PD solutions using the same design and layout without having to re-spin the motherboard. This is achieved by defining a new interface and ball-out which support dual port PD solution that meet the system requirements. The embodiments employ an interposer to unify different PD solutions. The interposer is part of a unique Land Grid Array (LGA) soldered down solution with pre-defined interface employing a generic pinout to support PD solutions for dual type-C ports from different vendors. The interposer includes an LGA having a pattern of pads that is coupled to a LGA on a platform PCB with a matching pattern.
    Type: Application
    Filed: August 23, 2022
    Publication date: December 22, 2022
    Inventors: Tomer SAVARIEGO, Richard S. PERRY, Oren HUBER, Venkataramani GOPALAKRISHNAN