Patents by Inventor Tomihiro Suzuki

Tomihiro Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4801867
    Abstract: In monolithic microwave integrated circuits of resistance-capacitance construction, selection after production can be easily performed without sacrificing high frequency characteristics by adding thereto composing pads such as pads for signal, pads for power source, pads for bias and the like and pads for measuring direct current characteristics and selecting chips. Further, said monolithic microwave integrated circuits added with pads for measuring and selecting direct current characteristics can be easily selected by probing them on wafers.
    Type: Grant
    Filed: November 6, 1987
    Date of Patent: January 31, 1989
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Tomihiro Suzuki
  • Patent number: 4755695
    Abstract: A semiconductor logic circuit device uses a plurality of MESFETs and a Schottky barrier diode (11) interconnected in such a way that one MESFET forms a switching input (9), another MESFET may form a load (8), still another MESFET forms a buffer amplifier stage (10), a further MESFET forms a current source, and the Schottky barrier diode operates as a speed-up capacitor for increasing the response characteristic of the buffer stage. Different types of logic circuits may be formed.
    Type: Grant
    Filed: August 5, 1986
    Date of Patent: July 5, 1988
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Tomihiro Suzuki
  • Patent number: 4709251
    Abstract: A Schottky-gate field effect transistor comprises a semi-insulative semiconductor substrate, an active layer formed on one surface of the substrate, a source electrode and a drain electrode on the active layer in ohmic contact thereto, respectively, a first Schottky gate electrode on the active layer between the source and drain electrodes, and a second Schottky gate electrode on the active layer between the drain electrode and the first gate electrode. A portion of the active layer underneath the second gate electrode has a sheet resistance smaller than that of the active layer portion underneath the first gate electrode. The source electrode and the second electrode is electrically interconnected by connection means formed on the substrate.
    Type: Grant
    Filed: August 21, 1985
    Date of Patent: November 24, 1987
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Tomihiro Suzuki