Abstract: A charge transfer device having a charge transfer portion in which a plurality of electrode pairs are formed above a transfer channel, with the plurality of electrode pairs commonly wired forming N (where N=2, 3, 4, . . . natural numbers) bits of the charge transfer portion bits so that electrode pairs of each half bit can be independently driven at every N bits, inputting the electrode pairs of each half bit with the same drive pulse to operate it by a two-phase complementary drive in a normal operation, and in an N-time speed operation, inputting the electrode pairs of N bits with N pairs of complementary drive pulses to operate them by a 2N-phase complementary drive.

Abstract: A charge transfer device according to the present invention is one having a charge transfer portion in which a plurality of electrode pairs are formed above a transfer channel, and includes means for commonly wiring the plurality of electrode pairs forming N (N=2, 3, 4, . . . natural numbers) bits of the charge transfer portion bits so that electrode pairs of each half bit can be independently driven at every N bits, means for, in a normal operation, inputting the electrode pairs of each half bit with the same drive pulse to operate it by a two-phase complementary drive, and means for, in an N-time speed operation, inputting the electrode pairs of N bits with N pairs of complementary drive pulses to operate them by a 2N-phase complementary drive.

Abstract: An image pickup device is operated in a thinning mode, an image pickup signal is supplied to a liquid crystal display, and a pickup image is displayed (monitoring mode). The image pickup device is operated in a progressive scan reading mode and the image pickup signal is written into a DRAM (first recording mode). After completion of the writing, data compressed by an encoder/decoder is written into a flash memory and the image pickup signal is displayed (second recording mode). The image pickup signal is read out from the flash memory and decoded and written into the DRAM and the image pickup signal is displayed (first reproducing mode). The data is thinned and read out from the DRAM and displayed (second reproducing mode). A switching operation of those modes is controlled by a data switcher and a microcomputer.

Abstract: A solid state image pickup device of an interline system. The device includes a plurality of photosensors, which are arranged in a matrix form, which receive light transmitted through a plurality of color filters, and which are repeated in the vertical direction at a period of “N” pixels. A vertical transfer unit is provided for transferring charges read out from the plurality of photosensors. A horizontal transfer unit is coupled to the vertical transfer unit, and is used to horizontally transfer the charges transferred by the vertical transfer unit. Charges are passed to the vertical transfer unit by a first signal supplying unit and a second signal supplying unit. At least one of the signal supplying units is made up of “m” first photosensor groups arranged in the vertical direction and second photosensor groups numbering “a” times as large as the pixel period “N” and which are also arranged in the vertical direction.

Abstract: An all-pixel reading image sensor or a noninterlaced output image sensor, in which an interlaced signal can selectively be output without the use of a frame memory or the like as an external circuit. For outputting an interlaced signal from a three-layer three-phase drive all-pixel reading CCD image sensor, vertical shift registers are supplied with first through third vertical transfer pulses to transfer signal charges in the pixels of an nth line, for example, to a horizontal shift register, and then the horizontal shift register is supplied with horizontal transfer pulses to transfer (shift) the signal charges of the nth line stored in the horizontal shift register by two pixels, for example, to an output unit.

Abstract: An electronic still camera requires a solid-state image sensing apparatus capable of providing a higher-speed pickup image signal having a high vertical resolution. In a line reducing operation to reduce the number of lines of the pickup image signal to be output by applying read-out pulses to read-out gate units located at predetermined intervals in order to read out only signal electric charge from sensor units for picture elements arranged in the vertical direction on some lines, a vertical CCD is driven by a combination of a pair of vertical transfer clock signals .o slashed.V1 (.o slashed.V1') and .o slashed.V3 (.o slashed.V3') having phases opposite to each other and another pair of vertical transfer clock signals .o slashed.V2 and .o slashed.V4 also having phases opposite to each other, allowing the overlap period twice the vertical transfer clock signals to be lengthened.

Abstract: A CCD type solid state imaging device including a plurality of vertically arranged light receiving elements, a plurality of vertical charge transfer electrodes associated with the light receiving elements and transfer channels through which signal electrical charges stored in the light receiving elements are readout and transferred in the charge transfer direction by the transfer electrodes. The present invention features that unlike the conventional CCD type solid state imaging device, the boundary line between at least a part of the vertical charge transfer electrodes and a part of the vertical charge transfer electrodes adjacent thereto is held aslant with respect to the transfer channels so that the vertical transfer efficiency of the device is increased without incurring a reduction in the amount of signal charges being handled and the readout of the signal charges stored in the light receiving elements to the transfer channels is performed more smoothly than the conventional device.

Abstract: A CCD area sensor comprising two horizontal transfer registers and a charge discharging section comprising a sweep-out electrode adjacent to the side of a horizontal register opposite to an image section and drain section, wherein the horizontal transfer register has a multi-channel structure comprising two transfer channels and a distribution electrode.

Abstract: There is provided a solid state imaging apparatus which has realized sharing of signal charges without generation of a fault of image like a vertical stripe resulting from defective sharing of signal charges in a horizontal transfer register consisting of a pair of transfer sections for horizontal transfer by sharing therewith the signal charges of the same pixel. In this solid state imaging apparatus, a pair of horizontal transfer registers 4 (6) are provided to execute horizontal transfer by sharing the signal charges of the same pixel in the first horizontal transfer register 4 in the side of the image section with a pair of transfer sections 4a, 4b with the control gate section 5. For the sharing of signal charges, a transfer channel 17 is formed in the transfer gate section 5 between the bit (.phi.H2) of the transfer section 4a and the bit (.phi.H1) one bit after, in the horizontal transfer direction, the bit (.phi.