Patents by Inventor Tomio Kusano

Tomio Kusano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8541871
    Abstract: A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: September 24, 2013
    Assignee: Panasonic Corporation
    Inventors: Hidekazu Tomohiro, Masayuki Fujii, Norio Satou, Tomoyuki Yamada, Tomio Kusano
  • Patent number: 7994616
    Abstract: A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: August 9, 2011
    Assignee: Panasonic Corporation
    Inventors: Hidekazu Tomohiro, Masayuki Fujii, Norio Satou, Tomoyuki Yamada, Tomio Kusano
  • Publication number: 20100155770
    Abstract: A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
    Type: Application
    Filed: March 3, 2010
    Publication date: June 24, 2010
    Applicant: Panasonic Corporation
    Inventors: Hidekazu TOMOHIRO, Masayuki Fujii, Norio Satou, Tomoyuki Yamada, Tomio Kusano
  • Patent number: 7692277
    Abstract: A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: April 6, 2010
    Assignee: Panasonic Corporation
    Inventors: Hidekazu Tomohiro, Masayuki Fujii, Norio Satou, Tomoyuki Yamada, Tomio Kusano
  • Publication number: 20090283791
    Abstract: A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
    Type: Application
    Filed: July 24, 2009
    Publication date: November 19, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Hidekazu TOMOHIRO, Masayuki Fujii, Norio Satou, Tomoyuki Yamada, Tomio Kusano
  • Publication number: 20060102936
    Abstract: A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
    Type: Application
    Filed: January 13, 2004
    Publication date: May 18, 2006
    Inventors: Hidekazu Tomohiro, Masayuki Fujii, Norio Satou, Tomoyuki Yamada, Tomio Kusano